diff options
| author | Reka Norman <rekanorman@chromium.org> | 2023-08-07 06:49:32 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-22 15:47:56 +0000 |
| commit | 8d357b521ea927906019ac749b830f34fc029560 (patch) | |
| tree | b015b5e8dd4a584f8d52e231c7e2d4efeaf91e98 /src/soc/intel | |
| parent | d4aef2b31fd76c3ad0883bf192e886a94152702d (diff) | |
Revert "soc/intel/common/block/cse/Kconfig: Remove unused symbols"
This reverts commit 06cb756f0202d78d299b30728b6559f6107c43c3.
Reason for revert: These Kconfigs are needed by boards which use the
CSE stitching tools (i.e. select STITCH_ME_BIN). They're selected by
some boards in the downstream ChromeOS repo. They're used in
src/soc/intel/Makefile.inc (see the line with
`$(CONFIG_CSE_$(2)_FILE)`).
Change-Id: Ide6fc74b457439f06b7ef9b37f11d6c9ff226b80
Signed-off-by: Reka Norman <rekanorman@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76719
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/cse/Kconfig | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index 1acad624b6..e46becc52d 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -376,17 +376,55 @@ config CSE_DATA_FILE help This file is the CSE data binary typically generated by Intel FIT tool. +config CSE_PMCP_FILE + string "Name of PMC file" + default "pmc.bin" + help + This file is the PMC input binary as released by Intel in a CSE kit. + +config CSE_IOMP_FILE + string "Name of IOM file" + default "iom.bin" + help + This file is the IOM input binary as released by Intel in a CSE kit. + +config CSE_TBTP_FILE + string "Name of TBT file" + default "tbt.bin" + help + This file is the TBT input binary as released by Intel in a CSE kit. + config CSE_NPHY_FILE string "Name of NPHY file" default "nphy.bin" help This file is the NPHY input binary as released by Intel in a CSE kit. +config CSE_PCHC_FILE + string "Name of PCHC file" + default "pchc.bin" + help + This file is the PCHC input binary as released by Intel in a CSE kit. + +config CSE_IUNP_FILE + string "Name of IUNIT file" + default "iunit.bin" + help + This file is the PCHC input binary as released by Intel in a CSE kit. + config CSE_BPDT_VERSION string help This config indicates the BPDT version used by CSE for a given SoC. +config CSE_OEMP_FILE + string "Name of OEM Key Manifest file" + default "oem_km.bin" + help + OEM Key Manifest lists the public key hashes used for authenticating the + OEM created binaries to be loaded. This binary is generated by signing with + the key owned by trusted owner. + endif config CSE_RESET_CLEAR_EC_AP_IDLE_FLAG |