diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2023-04-24 18:12:19 -0700 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2023-07-13 01:05:52 +0000 |
| commit | 6e64c01d08a56b30c970d6a86466dc8dfb06d17e (patch) | |
| tree | 6004444292f33604b3f0210f3b1ad5b27f140468 /src/soc/intel | |
| parent | 7d1a037f881f08969e47c197023f53b39ab7a6a6 (diff) | |
soc/intel/alderlake: Hook up UPD EnableHwpScalabilityTracking
Hook the newly exposed EnableHwpScalabilityTracking UPD up so that
boards can configure is via devicetree.
BUG=b:280021171
TEST=Verified by enabling/disabling the UPD on google/brya
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I4c8845c445d46caa30a0245386ab9cd690d2623f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74722
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/chip.h | 7 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 4 |
2 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index 591d8be52f..df978a99e6 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -744,6 +744,13 @@ struct soc_intel_alderlake_config { * Set this to 1 in order to disable SaGV reordering. */ bool disable_sagv_reorder; + + /* + * Enable or Disable hwp scalability tracking. + * Default is set to 1. + * Set this to 0 in order to disable hwp scalability tracking. + */ + bool enable_hwp_scalability_tracking; }; typedef struct soc_intel_alderlake_config config_t; diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 214a70075b..657e089a63 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -1024,6 +1024,10 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg, s_cfg->C1e = 0; else s_cfg->C1e = 1; + +#if CONFIG(SOC_INTEL_RAPTORLAKE) + s_cfg->EnableHwpScalabilityTracking = config->enable_hwp_scalability_tracking; +#endif } static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg, |