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authorAaron Durbin <adurbin@chromium.org>2014-01-14 17:34:10 -0600
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-15 05:06:17 +0200
commit59d1d87c86ff26142de23fd372fece3977a7330c (patch)
tree8955044c9213b57a373087d89f32137f20d446d2 /src/soc/intel
parent3f94a74de29c660555d10fc3ddc18626668c618a (diff)
baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
On baytrail, it appears that the turbo disable setting is actually building-block scoped. One can see this on quad core parts where if enable_turbo() is called only on the BSP then only cpus 0 and 1 have turbo enabled. Fix this by calling enable_turbo() on all non-bsp cpus. BUG=chrome-os-partner:25014 BRANCH=baytrail TEST=Built and booted rambi. All cpus have bit 38 set to 0 in msr 0x1a0. Change-Id: Id493e070c4a70bb236cdbd540d2321731a99aec2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182406 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/5048 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/baytrail/Kconfig1
-rw-r--r--src/soc/intel/baytrail/cpu.c9
2 files changed, 9 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 969fa154e2..9a3fa920be 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -14,6 +14,7 @@ config CPU_SPECIFIC_OPTIONS
select CACHE_MRC_SETTINGS
select CAR_MIGRATION
select COLLECT_TIMESTAMPS
+ select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
select CPU_MICROCODE_IN_CBFS
select DYNAMIC_CBMEM
select HAVE_MONOTONIC_TIMER
diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c
index 3ae297ca8a..15efab9e62 100644
--- a/src/soc/intel/baytrail/cpu.c
+++ b/src/soc/intel/baytrail/cpu.c
@@ -92,7 +92,7 @@ void baytrail_init_cpus(device_t dev)
/* Set package MSRs */
reg_script_run(package_msr_script);
- /* Enable Turbo/Burst Mode */
+ /* Enable Turbo Mode on BSP and siblings of the BSP's building block. */
enable_turbo();
if (mp_init(cpu_bus, &mp_params)) {
@@ -104,6 +104,13 @@ static void baytrail_core_init(device_t cpu)
{
printk(BIOS_DEBUG, "Init BayTrail core.\n");
+ /* On bay trail the turbo disable bit is actually scoped at building
+ * block level -- not package. For non-bsp cores that are within a
+ * building block enable turbo. The cores within the BSP's building
+ * block will just see it already enabled and move on. */
+ if (lapicid())
+ enable_turbo();
+
/* Set core MSRs */
reg_script_run(core_msr_script);