diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-06-02 00:25:36 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-06-04 14:44:23 +0000 |
| commit | 5790956f374d3ee696fde4de6b2520f4fff3df43 (patch) | |
| tree | f2d36ef0052051ae0ecffc3d4da19f2681980694 /src/soc/intel | |
| parent | 0b92aa618fbb73363501b8bfb8e9f51bdd9e3b3e (diff) | |
soc/intel/cmn/cse: Fix return type for `devfn`
This patch fixes the return type for `devfn` variable inside
heci_set_to_d0i3(). `PCI_DEVFN` macro returns `unsigned int`
instead of `pci_devfn_t`.
TEST=Able to build and boot to ChromeOS without any failure.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ib3a575aa7d71cbe6932e823917b57c5558387433
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64877
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/cse/cse.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index e01b1cf920..1c7e218273 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -1012,7 +1012,7 @@ void cse_set_to_d0i3(void) void heci_set_to_d0i3(void) { for (int i = 0; i < CONFIG_MAX_HECI_DEVICES; i++) { - pci_devfn_t devfn = PCI_DEVFN(PCH_DEV_SLOT_CSE, i); + unsigned int devfn = PCI_DEVFN(PCH_DEV_SLOT_CSE, i); if (!is_cse_devfn_visible(devfn)) continue; |