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authorAngel Pons <th3fanbus@gmail.com>2021-02-19 20:38:37 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-03-01 19:41:17 +0000
commit53496e69ece91d388d66cf26ccc49a1e0a52f833 (patch)
treee1873cb23b54f058183ab22b795564503923c446 /src/soc/intel
parentec1b37decc207f95f7d0cd9680d1f2aab4b9d1c5 (diff)
soc/intel: Drop `romstage_pch_init()` function
It only calls `smbus_common_init()`, so just call that directly. Change-Id: I0237f52bb9b0503e83f5dbf31c4064bd0f5bae28 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50947 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/alderlake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/alderlake/romstage/Makefile.inc1
-rw-r--r--src/soc/intel/alderlake/romstage/pch.c10
-rw-r--r--src/soc/intel/alderlake/romstage/romstage.c5
-rw-r--r--src/soc/intel/cannonlake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/cannonlake/romstage/Makefile.inc1
-rw-r--r--src/soc/intel/cannonlake/romstage/pch.c10
-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c5
-rw-r--r--src/soc/intel/elkhartlake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/elkhartlake/romstage/Makefile.inc1
-rw-r--r--src/soc/intel/elkhartlake/romstage/pch.c10
-rw-r--r--src/soc/intel/elkhartlake/romstage/romstage.c5
-rw-r--r--src/soc/intel/icelake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/icelake/romstage/Makefile.inc1
-rw-r--r--src/soc/intel/icelake/romstage/pch.c10
-rw-r--r--src/soc/intel/icelake/romstage/romstage.c5
-rw-r--r--src/soc/intel/jasperlake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/jasperlake/romstage/Makefile.inc1
-rw-r--r--src/soc/intel/jasperlake/romstage/pch.c10
-rw-r--r--src/soc/intel/jasperlake/romstage/romstage.c5
-rw-r--r--src/soc/intel/skylake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/skylake/romstage/Makefile.inc1
-rw-r--r--src/soc/intel/skylake/romstage/pch.c10
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c5
-rw-r--r--src/soc/intel/tigerlake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/tigerlake/romstage/Makefile.inc1
-rw-r--r--src/soc/intel/tigerlake/romstage/pch.c10
-rw-r--r--src/soc/intel/tigerlake/romstage/romstage.c5
28 files changed, 21 insertions, 98 deletions
diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h
index c72c8aa4f8..13a5b5f9ca 100644
--- a/src/soc/intel/alderlake/include/soc/romstage.h
+++ b/src/soc/intel/alderlake/include/soc/romstage.h
@@ -8,7 +8,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd);
void systemagent_early_init(void);
-void romstage_pch_init(void);
/* Board type */
enum board_type {
diff --git a/src/soc/intel/alderlake/romstage/Makefile.inc b/src/soc/intel/alderlake/romstage/Makefile.inc
index a1a6c6638d..99c1d2ca25 100644
--- a/src/soc/intel/alderlake/romstage/Makefile.inc
+++ b/src/soc/intel/alderlake/romstage/Makefile.inc
@@ -3,5 +3,4 @@
romstage-y += fsp_params.c
romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage.c
-romstage-y += pch.c
romstage-y += systemagent.c
diff --git a/src/soc/intel/alderlake/romstage/pch.c b/src/soc/intel/alderlake/romstage/pch.c
deleted file mode 100644
index bec6150374..0000000000
--- a/src/soc/intel/alderlake/romstage/pch.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/smbus.h>
-#include <soc/romstage.h>
-
-void romstage_pch_init(void)
-{
- /* Program SMBus base address and enable it */
- smbus_common_init();
-}
diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c
index 6cd22d018a..cc3126bb41 100644
--- a/src/soc/intel/alderlake/romstage/romstage.c
+++ b/src/soc/intel/alderlake/romstage/romstage.c
@@ -7,6 +7,7 @@
#include <intelblocks/cfg.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
+#include <intelblocks/smbus.h>
#include <memory_info.h>
#include <soc/intel/common/smbios.h>
#include <soc/iomap.h>
@@ -120,8 +121,8 @@ void mainboard_romstage_entry(void)
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
systemagent_early_init();
- /* Perform PCH init */
- romstage_pch_init();
+ /* Program SMBus base address and enable it */
+ smbus_common_init();
/* Initialize HECI interface */
heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h
index 3772db4bc1..ba44f2df26 100644
--- a/src/soc/intel/cannonlake/include/soc/romstage.h
+++ b/src/soc/intel/cannonlake/include/soc/romstage.h
@@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd);
void systemagent_early_init(void);
-void romstage_pch_init(void);
/* Board type */
enum board_type {
diff --git a/src/soc/intel/cannonlake/romstage/Makefile.inc b/src/soc/intel/cannonlake/romstage/Makefile.inc
index 261e5b352b..3db91900b7 100644
--- a/src/soc/intel/cannonlake/romstage/Makefile.inc
+++ b/src/soc/intel/cannonlake/romstage/Makefile.inc
@@ -4,4 +4,3 @@ romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage.c
romstage-y += fsp_params.c
romstage-y += systemagent.c
-romstage-y += pch.c
diff --git a/src/soc/intel/cannonlake/romstage/pch.c b/src/soc/intel/cannonlake/romstage/pch.c
deleted file mode 100644
index f94d611abe..0000000000
--- a/src/soc/intel/cannonlake/romstage/pch.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/smbus.h>
-#include <soc/romstage.h>
-
-void romstage_pch_init(void)
-{
- /* Program SMBUS_BASE_ADDRESS and enable it */
- smbus_common_init();
-}
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 0bf0404ab9..a83cf616e8 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -7,6 +7,7 @@
#include <intelblocks/cfg.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
+#include <intelblocks/smbus.h>
#include <memory_info.h>
#include <soc/intel/common/smbios.h>
#include <soc/iomap.h>
@@ -121,8 +122,8 @@ void mainboard_romstage_entry(void)
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
systemagent_early_init();
- /* Program PCH init */
- romstage_pch_init();
+ /* Program SMBus base address and enable it */
+ smbus_common_init();
/* initialize Heci interface */
heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/elkhartlake/include/soc/romstage.h b/src/soc/intel/elkhartlake/include/soc/romstage.h
index 3772db4bc1..ba44f2df26 100644
--- a/src/soc/intel/elkhartlake/include/soc/romstage.h
+++ b/src/soc/intel/elkhartlake/include/soc/romstage.h
@@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd);
void systemagent_early_init(void);
-void romstage_pch_init(void);
/* Board type */
enum board_type {
diff --git a/src/soc/intel/elkhartlake/romstage/Makefile.inc b/src/soc/intel/elkhartlake/romstage/Makefile.inc
index a1a6c6638d..99c1d2ca25 100644
--- a/src/soc/intel/elkhartlake/romstage/Makefile.inc
+++ b/src/soc/intel/elkhartlake/romstage/Makefile.inc
@@ -3,5 +3,4 @@
romstage-y += fsp_params.c
romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage.c
-romstage-y += pch.c
romstage-y += systemagent.c
diff --git a/src/soc/intel/elkhartlake/romstage/pch.c b/src/soc/intel/elkhartlake/romstage/pch.c
deleted file mode 100644
index d3c2554425..0000000000
--- a/src/soc/intel/elkhartlake/romstage/pch.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/smbus.h>
-#include <soc/romstage.h>
-
-void romstage_pch_init(void)
-{
- /* Program SMBUS_BASE_ADDRESS and Enable it */
- smbus_common_init();
-}
diff --git a/src/soc/intel/elkhartlake/romstage/romstage.c b/src/soc/intel/elkhartlake/romstage/romstage.c
index 7ca031899f..ecbdd97e04 100644
--- a/src/soc/intel/elkhartlake/romstage/romstage.c
+++ b/src/soc/intel/elkhartlake/romstage/romstage.c
@@ -7,6 +7,7 @@
#include <intelblocks/cfg.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
+#include <intelblocks/smbus.h>
#include <memory_info.h>
#include <soc/intel/common/smbios.h>
#include <soc/iomap.h>
@@ -127,8 +128,8 @@ void mainboard_romstage_entry(void)
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
systemagent_early_init();
- /* Program PCH init */
- romstage_pch_init();
+ /* Program SMBus base address and enable it */
+ smbus_common_init();
/* initialize Heci interface */
heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/icelake/include/soc/romstage.h b/src/soc/intel/icelake/include/soc/romstage.h
index 3772db4bc1..ba44f2df26 100644
--- a/src/soc/intel/icelake/include/soc/romstage.h
+++ b/src/soc/intel/icelake/include/soc/romstage.h
@@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd);
void systemagent_early_init(void);
-void romstage_pch_init(void);
/* Board type */
enum board_type {
diff --git a/src/soc/intel/icelake/romstage/Makefile.inc b/src/soc/intel/icelake/romstage/Makefile.inc
index a1a6c6638d..99c1d2ca25 100644
--- a/src/soc/intel/icelake/romstage/Makefile.inc
+++ b/src/soc/intel/icelake/romstage/Makefile.inc
@@ -3,5 +3,4 @@
romstage-y += fsp_params.c
romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage.c
-romstage-y += pch.c
romstage-y += systemagent.c
diff --git a/src/soc/intel/icelake/romstage/pch.c b/src/soc/intel/icelake/romstage/pch.c
deleted file mode 100644
index d3c2554425..0000000000
--- a/src/soc/intel/icelake/romstage/pch.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/smbus.h>
-#include <soc/romstage.h>
-
-void romstage_pch_init(void)
-{
- /* Program SMBUS_BASE_ADDRESS and Enable it */
- smbus_common_init();
-}
diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c
index 15179745bd..1dc618c7ee 100644
--- a/src/soc/intel/icelake/romstage/romstage.c
+++ b/src/soc/intel/icelake/romstage/romstage.c
@@ -7,6 +7,7 @@
#include <intelblocks/cfg.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
+#include <intelblocks/smbus.h>
#include <memory_info.h>
#include <soc/intel/common/smbios.h>
#include <soc/iomap.h>
@@ -110,8 +111,8 @@ void mainboard_romstage_entry(void)
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
systemagent_early_init();
- /* Program PCH init */
- romstage_pch_init();
+ /* Program SMBus base address and enable it */
+ smbus_common_init();
/* initialize Heci interface */
heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/jasperlake/include/soc/romstage.h b/src/soc/intel/jasperlake/include/soc/romstage.h
index 3772db4bc1..ba44f2df26 100644
--- a/src/soc/intel/jasperlake/include/soc/romstage.h
+++ b/src/soc/intel/jasperlake/include/soc/romstage.h
@@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd);
void systemagent_early_init(void);
-void romstage_pch_init(void);
/* Board type */
enum board_type {
diff --git a/src/soc/intel/jasperlake/romstage/Makefile.inc b/src/soc/intel/jasperlake/romstage/Makefile.inc
index a1a6c6638d..99c1d2ca25 100644
--- a/src/soc/intel/jasperlake/romstage/Makefile.inc
+++ b/src/soc/intel/jasperlake/romstage/Makefile.inc
@@ -3,5 +3,4 @@
romstage-y += fsp_params.c
romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage.c
-romstage-y += pch.c
romstage-y += systemagent.c
diff --git a/src/soc/intel/jasperlake/romstage/pch.c b/src/soc/intel/jasperlake/romstage/pch.c
deleted file mode 100644
index d3c2554425..0000000000
--- a/src/soc/intel/jasperlake/romstage/pch.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/smbus.h>
-#include <soc/romstage.h>
-
-void romstage_pch_init(void)
-{
- /* Program SMBUS_BASE_ADDRESS and Enable it */
- smbus_common_init();
-}
diff --git a/src/soc/intel/jasperlake/romstage/romstage.c b/src/soc/intel/jasperlake/romstage/romstage.c
index 6d34b438cf..f7e6a91b6e 100644
--- a/src/soc/intel/jasperlake/romstage/romstage.c
+++ b/src/soc/intel/jasperlake/romstage/romstage.c
@@ -7,6 +7,7 @@
#include <intelblocks/cfg.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
+#include <intelblocks/smbus.h>
#include <memory_info.h>
#include <soc/intel/common/smbios.h>
#include <soc/iomap.h>
@@ -127,8 +128,8 @@ void mainboard_romstage_entry(void)
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
systemagent_early_init();
- /* Program PCH init */
- romstage_pch_init();
+ /* Program SMBus base address and enable it */
+ smbus_common_init();
/* initialize Heci interface */
heci_init(HECI1_BASE_ADDRESS);
diff --git a/src/soc/intel/skylake/include/soc/romstage.h b/src/soc/intel/skylake/include/soc/romstage.h
index 3772db4bc1..ba44f2df26 100644
--- a/src/soc/intel/skylake/include/soc/romstage.h
+++ b/src/soc/intel/skylake/include/soc/romstage.h
@@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd);
void systemagent_early_init(void);
-void romstage_pch_init(void);
/* Board type */
enum board_type {
diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc
index 1b069b6d49..dff89ce2dc 100644
--- a/src/soc/intel/skylake/romstage/Makefile.inc
+++ b/src/soc/intel/skylake/romstage/Makefile.inc
@@ -1,4 +1,3 @@
romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage.c
romstage-y += systemagent.c
-romstage-y += pch.c
diff --git a/src/soc/intel/skylake/romstage/pch.c b/src/soc/intel/skylake/romstage/pch.c
deleted file mode 100644
index f94d611abe..0000000000
--- a/src/soc/intel/skylake/romstage/pch.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/smbus.h>
-#include <soc/romstage.h>
-
-void romstage_pch_init(void)
-{
- /* Program SMBUS_BASE_ADDRESS and enable it */
- smbus_common_init();
-}
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index a20f27951f..97d21b2118 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -10,6 +10,7 @@
#include <fsp/util.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pmclib.h>
+#include <intelblocks/smbus.h>
#include <memory_info.h>
#include <smbios.h>
#include <soc/intel/common/smbios.h>
@@ -132,8 +133,8 @@ void mainboard_romstage_entry(void)
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
systemagent_early_init();
- /* Program PCH init */
- romstage_pch_init();
+ /* Program SMBus base address and enable it */
+ smbus_common_init();
ps = pmc_get_power_state();
s3wake = pmc_fill_power_state(ps) == ACPI_S3;
fsp_memory_init(s3wake);
diff --git a/src/soc/intel/tigerlake/include/soc/romstage.h b/src/soc/intel/tigerlake/include/soc/romstage.h
index 3772db4bc1..ba44f2df26 100644
--- a/src/soc/intel/tigerlake/include/soc/romstage.h
+++ b/src/soc/intel/tigerlake/include/soc/romstage.h
@@ -7,7 +7,6 @@
void mainboard_memory_init_params(FSPM_UPD *mupd);
void systemagent_early_init(void);
-void romstage_pch_init(void);
/* Board type */
enum board_type {
diff --git a/src/soc/intel/tigerlake/romstage/Makefile.inc b/src/soc/intel/tigerlake/romstage/Makefile.inc
index a1a6c6638d..99c1d2ca25 100644
--- a/src/soc/intel/tigerlake/romstage/Makefile.inc
+++ b/src/soc/intel/tigerlake/romstage/Makefile.inc
@@ -3,5 +3,4 @@
romstage-y += fsp_params.c
romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage.c
-romstage-y += pch.c
romstage-y += systemagent.c
diff --git a/src/soc/intel/tigerlake/romstage/pch.c b/src/soc/intel/tigerlake/romstage/pch.c
deleted file mode 100644
index d3c2554425..0000000000
--- a/src/soc/intel/tigerlake/romstage/pch.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/smbus.h>
-#include <soc/romstage.h>
-
-void romstage_pch_init(void)
-{
- /* Program SMBUS_BASE_ADDRESS and Enable it */
- smbus_common_init();
-}
diff --git a/src/soc/intel/tigerlake/romstage/romstage.c b/src/soc/intel/tigerlake/romstage/romstage.c
index 8b7dc23e49..872cca5c52 100644
--- a/src/soc/intel/tigerlake/romstage/romstage.c
+++ b/src/soc/intel/tigerlake/romstage/romstage.c
@@ -7,6 +7,7 @@
#include <intelblocks/cfg.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
+#include <intelblocks/smbus.h>
#include <memory_info.h>
#include <soc/intel/common/smbios.h>
#include <soc/iomap.h>
@@ -127,8 +128,8 @@ void mainboard_romstage_entry(void)
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */
systemagent_early_init();
- /* Program PCH init */
- romstage_pch_init();
+ /* Program SMBus base address and enable it */
+ smbus_common_init();
/* initialize Heci interface */
heci_init(HECI1_BASE_ADDRESS);