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authorKyösti Mälkki <kyosti.malkki@gmail.com>2022-12-02 19:16:21 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2022-12-07 11:33:38 +0000
commit521e0460e4292ff0bdaad4ca3861603d13ccfe1d (patch)
treed0f50fdf75599471abca42603c6a1f21f348cfb6 /src/soc/intel
parent2c3ebd8b9d56c01d8e4adadf6f4e4d5b56cdb4e1 (diff)
sb,soc/intel,mb: Drop leftover comments and TODOs in ASL
Change-Id: I74f943e9b616458a16aa13c29706cf1551fcbbb2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70366 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/baytrail/acpi/southcluster.asl9
-rw-r--r--src/soc/intel/braswell/acpi/southcluster.asl9
-rw-r--r--src/soc/intel/broadwell/pch/acpi/pch.asl8
-rw-r--r--src/soc/intel/denverton_ns/acpi/southcluster.asl9
4 files changed, 0 insertions, 35 deletions
diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index c994fdabbe..49d53f8f68 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -5,15 +5,6 @@
Scope(\)
{
- /* IO-Trap at 0x800. This is the ACPI->SMI communication interface. */
-
- OperationRegion(IO_T, SystemIO, 0x800, 0x10)
- Field(IO_T, ByteAcc, NoLock, Preserve)
- {
- Offset(0x8),
- TRP0, 8 /* IO-Trap at 0x808 */
- }
-
/* Intel Legacy Block */
OperationRegion(ILBS, SystemMemory, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
Field (ILBS, AnyAcc, NoLock, Preserve)
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl
index 8e765de4ff..2a012e0778 100644
--- a/src/soc/intel/braswell/acpi/southcluster.asl
+++ b/src/soc/intel/braswell/acpi/southcluster.asl
@@ -5,15 +5,6 @@
Scope(\)
{
- /* IO-Trap at 0x800. This is the ACPI->SMI communication interface. */
-
- OperationRegion(IO_T, SystemIO, 0x800, 0x10)
- Field(IO_T, ByteAcc, NoLock, Preserve)
- {
- Offset(0x8),
- TRP0, 8 /* IO-Trap at 0x808 */
- }
-
/* Intel Legacy Block */
OperationRegion(ILBS, SystemMemory, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
Field (ILBS, AnyAcc, NoLock, Preserve)
diff --git a/src/soc/intel/broadwell/pch/acpi/pch.asl b/src/soc/intel/broadwell/pch/acpi/pch.asl
index d0d92fe103..5e1f7206d6 100644
--- a/src/soc/intel/broadwell/pch/acpi/pch.asl
+++ b/src/soc/intel/broadwell/pch/acpi/pch.asl
@@ -9,14 +9,6 @@
Scope (\)
{
- // IO-Trap at 0x800. This is the ACPI->SMI communication interface.
- OperationRegion (IO_T, SystemIO, 0x800, 0x10)
- Field (IO_T, ByteAcc, NoLock, Preserve)
- {
- Offset (0x8),
- TRP0, 8 // IO-Trap at 0x808
- }
-
// Root Complex Register Block
OperationRegion (RCRB, SystemMemory, CONFIG_FIXED_RCBA_MMIO_BASE, CONFIG_RCBA_LENGTH)
Field (RCRB, DWordAcc, Lock, Preserve)
diff --git a/src/soc/intel/denverton_ns/acpi/southcluster.asl b/src/soc/intel/denverton_ns/acpi/southcluster.asl
index 72e12bd299..b864513de3 100644
--- a/src/soc/intel/denverton_ns/acpi/southcluster.asl
+++ b/src/soc/intel/denverton_ns/acpi/southcluster.asl
@@ -4,15 +4,6 @@
Scope(\)
{
- // IO-Trap at 0x800. This is the ACPI->SMI communication interface.
-
- OperationRegion(IO_T, SystemIO, 0x800, 0x10)
- Field(IO_T, ByteAcc, NoLock, Preserve)
- {
- Offset(0x8),
- TRP0, 8 // IO-Trap at 0x808
- }
-
// Private Chipset Register(PCR). Memory Mapped through ILB
OperationRegion(PCRR, SystemMemory, DEFAULT_PCR_BASE, 0x01000000)
Field(PCRR, DWordAcc, Lock, Preserve)