diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-04-29 14:22:18 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-05 14:22:06 +0000 |
| commit | 45789141538030777f302a9c141e9d1a4c9fbd3b (patch) | |
| tree | e6b83ab9f18a4d6b3edf0224bd4a3ff623c7c8d4 /src/soc/intel | |
| parent | a3146205c382ffdd440dc9c7ea2cac9b0f577aef (diff) | |
soc/intel/alderlake: Call into PMC IPC to inform PCI enumeration done
This patch calls into the PMC IPC function that informs about PMC
enumeration.
Note: Alder Lake FSP Notify Phase 1 callback missed to send this PMC
IPC, hence, this patch is considered as an improvement over FSP Notify
Phase API.
BUG=b:211954778
TEST=Able to build and boot google/redrix to OS without any PMC IPC
error.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I43cfad25a5861c5aa5dae293ff42c9cefe862ea2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63954
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/lockdown.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/lockdown.c b/src/soc/intel/alderlake/lockdown.c index d926dbbe2d..c291e34331 100644 --- a/src/soc/intel/alderlake/lockdown.c +++ b/src/soc/intel/alderlake/lockdown.c @@ -9,6 +9,7 @@ #include <device/mmio.h> #include <intelblocks/cfg.h> #include <intelblocks/pcr.h> +#include <intelblocks/pmclib.h> #include <intelpch/lockdown.h> #include <soc/pcr_ids.h> #include <soc/pm.h> @@ -36,6 +37,9 @@ static void pmc_lockdown_cfg(int chipset_lockdown) setbits32(pmcbase + PM_CFG, PM_CFG_DBG_MODE_LOCK | PM_CFG_XRAM_READ_DISABLE); } + + /* Send PMC IPC to inform about PCI enumeration done */ + pmc_send_pci_enum_done(); } static void pch_lockdown_cfg(void) |