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authorFurquan Shaikh <furquan@google.com>2016-05-06 09:50:35 -0700
committerFurquan Shaikh <furquan@google.com>2016-05-09 19:10:00 +0200
commit12a8aba4189d1f628a481942b08275503837dd88 (patch)
treef0727b6e60aa46de073b694b1b57a9266bebbf38 /src/soc/intel
parent6ec72c9b4f4a903d9a451bc17629e679399aa9ee (diff)
soc/intel/apollolake: Select no stage caching for resume
Select NO_STAGE_CACHE so that ramstage is not cached for resume. Change-Id: I9ca71686e0f617bb24713ec9ba07b5255c218f66 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14637 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index d6d4d1f86d..3e46a0e115 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select NO_FIXED_XIP_ROM_SIZE
+ select NO_STAGE_CACHE
select NO_XIP_EARLY_STAGES
select PARALLEL_MP
select PCIEXP_ASPM