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authorFurquan Shaikh <furquan@google.com>2020-11-11 23:23:13 -0800
committerFurquan Shaikh <furquan@google.com>2020-12-08 18:59:18 +0000
commitf5b30eda1fa02ecd7b23bbb9c0bf40932f3cde9b (patch)
treede6eae6dac5933edbb26250cabf7bdd72c143906 /src/soc/intel
parent73982edadd83319339839fec026d29abd24034de (diff)
commonlib/region: Allow multiple windows for xlate_region_dev
This change updates the translated region device (xlate_region_dev) to support multiple translation windows from the 1st address space to 2nd address space. The address spaces described by the translation windows can be non-contiguous in both spaces. This is required so that newer x86 platforms can describe memory mapping of SPI flash into multiple decode windows in order to support greater than 16MiB of memory mapped space. Since the windows can be non-contiguous, it introduces new restrictions on the region device ops - any operation performed on the translated region device is limited to only 1 window at a time. This restriction is primarily because of the mmap operation. The caller expects that the memory mapped space is contiguous, however, that is not true anymore. Thus, even though the other operations (readat, writeat, eraseat) can be updated to translate into multiple operations one for each access device, all operations across multiple windows are prohibited for the sake of consistency. It is the responsibility of the platform to ensure that any section that is operated on using the translated region device does not span multiple windows in the fmap description. One additional difference in behavior is xlate_region_device does not perform any action in munmap call. This is because it does not keep track of the access device that was used to service the mmap request. Currently, xlate_region_device is used only by memory mapped boot media on the backend. So, not doing unmap is fine. If this needs to be changed in the future, xlate_region_device will have to accept a pre-allocated space from the caller to keep track of all mapping requests. BUG=b:171534504 Change-Id: Id5b21ffca2c8d6a9dfc37a878429aed4a8301651 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47658 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/mmap_boot.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c
index 30c629e4de..79c2a0716b 100644
--- a/src/soc/intel/apollolake/mmap_boot.c
+++ b/src/soc/intel/apollolake/mmap_boot.c
@@ -43,6 +43,7 @@ static size_t bios_size;
static struct mem_region_device shadow_dev;
static struct xlate_region_device real_dev;
+static struct xlate_window real_dev_window;
static void bios_mmap_init(void)
{
@@ -68,9 +69,8 @@ static void bios_mmap_init(void)
mem_region_device_ro_init(&shadow_dev, (void *)base,
bios_mapped_size);
- xlate_region_device_ro_init(&real_dev, &shadow_dev.rdev,
- start, bios_mapped_size,
- CONFIG_ROM_SIZE);
+ xlate_window_init(&real_dev_window, &shadow_dev.rdev, start, bios_mapped_size);
+ xlate_region_device_ro_init(&real_dev, 1, &real_dev_window, CONFIG_ROM_SIZE);
bios_size = size;
@@ -78,7 +78,7 @@ static void bios_mmap_init(void)
easy to forget the SRAM mapping when crafting an FMAP file. */
struct region cbfs_region;
if (!fmap_locate_area("COREBOOT", &cbfs_region) &&
- !region_is_subregion(&real_dev.sub_region, &cbfs_region))
+ !region_is_subregion(&real_dev_window.sub_region, &cbfs_region))
printk(BIOS_CRIT,
"ERROR: CBFS @ %zx size %zx exceeds mem-mapped area @ %zx size %zx\n",
region_offset(&cbfs_region), region_sz(&cbfs_region),