pci: Move inline PCI functions to pci_ops.h

Move inline function where they belong to. Fixes compilation
on non x86 platforms.

Change-Id: Ia05391c43b8d501bd68df5654bcfb587f8786f71
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25720
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

13 files changed, 13 insertions, 1 deletions

diff --git a/src/soc/intel/apollolake/cse.c b/src/soc/intel/apollolake/cse.c
index 3e1792c84a..8842500fa8 100644
--- a/src/soc/intel/apollolake/cse.c
+++ b/src/soc/intel/apollolake/cse.c
@@ -20,6 +20,7 @@
 #include <fmap.h>
 #include <intelblocks/cse.h>
 #include <soc/pci_devs.h>
+#include <device/pci_ops.h>
 #include <stdint.h>
 #include <compiler.h>
 
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index 69c1eb81dc..162542fe3e 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -19,7 +19,7 @@
 #include <arch/io.h>
 #include <arch/smp/mpspec.h>
 #include <cbmem.h>
-#include <console/console.h>
+#include <device/pci_ops.h>
 #include <cpu/x86/smm.h>
 #include <console/console.h>
 #include <types.h>
diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c
index aff66a3e09..12d278fce7 100644
--- a/src/soc/intel/broadwell/pcie.c
+++ b/src/soc/intel/broadwell/pcie.c
@@ -20,6 +20,7 @@
 #include <device/pciexp.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <device/pci_ops.h>
 #include <soc/gpio.h>
 #include <soc/lpc.h>
 #include <soc/iobp.h>
diff --git a/src/soc/intel/broadwell/romstage/pch.c b/src/soc/intel/broadwell/romstage/pch.c
index 35a361ae4f..7e614c1aa4 100644
--- a/src/soc/intel/broadwell/romstage/pch.c
+++ b/src/soc/intel/broadwell/romstage/pch.c
@@ -17,6 +17,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <reg_script.h>
 #include <soc/iomap.h>
 #include <soc/lpc.h>
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
index cd77747716..c6c1694561 100644
--- a/src/soc/intel/cannonlake/pmc.c
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -19,6 +19,7 @@
 #include <chip.h>
 #include <console/console.h>
 #include <device/device.h>
+#include <device/pci_ops.h>
 #include <intelblocks/pmc.h>
 #include <intelblocks/pmclib.h>
 #include <intelblocks/rtc.h>
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index 288e0c4389..b13408af7b 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -16,6 +16,7 @@
 #include <arch/io.h>
 #include <assert.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <commonlib/helpers.h>
 #include <console/console.h>
 #include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c
index 8bf27de1cf..175fad8b24 100644
--- a/src/soc/intel/common/block/gspi/gspi.c
+++ b/src/soc/intel/common/block/gspi/gspi.c
@@ -21,6 +21,7 @@
 #include <delay.h>
 #include <device/device.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <intelblocks/gspi.h>
 #include <string.h>
 #include <timer.h>
diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c
index 7d383fdfaa..4cd057d363 100644
--- a/src/soc/intel/common/block/pcie/pcie.c
+++ b/src/soc/intel/common/block/pcie/pcie.c
@@ -18,6 +18,7 @@
 #include <device/pciexp.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <device/pci_ops.h>
 
 #define CACHE_LINE_SIZE	0x10
 /* Latency tolerance reporting, max non-snoop latency value 3.14ms */
diff --git a/src/soc/intel/common/block/pcr/pcr.c b/src/soc/intel/common/block/pcr/pcr.c
index cf487c5589..39f9bb832f 100644
--- a/src/soc/intel/common/block/pcr/pcr.c
+++ b/src/soc/intel/common/block/pcr/pcr.c
@@ -17,6 +17,7 @@
 #include <assert.h>
 #include <console/console.h>
 #include <intelblocks/pcr.h>
+#include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 #include <timer.h>
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 699d76affa..3d133f9266 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -49,6 +49,7 @@
 #include <types.h>
 #include <vendorcode/google/chromeos/gnvs.h>
 #include <wrdd.h>
+#include <device/pci_ops.h>
 
 /*
  * List of suported C-states in this processor.
diff --git a/src/soc/intel/skylake/pmc.c b/src/soc/intel/skylake/pmc.c
index 297188bfe4..ecdc6bb93b 100644
--- a/src/soc/intel/skylake/pmc.c
+++ b/src/soc/intel/skylake/pmc.c
@@ -19,6 +19,7 @@
 #include <chip.h>
 #include <console/console.h>
 #include <device/device.h>
+#include <device/pci_ops.h>
 #include <intelblocks/pmc.h>
 #include <intelblocks/pmclib.h>
 #include <intelblocks/rtc.h>
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c
index 1d635834ab..2c4408fec6 100644
--- a/src/soc/intel/skylake/systemagent.c
+++ b/src/soc/intel/skylake/systemagent.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>
+#include <device/pci_ops.h>
 #include <intelblocks/systemagent.h>
 #include <soc/cpu.h>
 #include <soc/iomap.h>
diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c
index 053e793107..0659d04e3a 100644
--- a/src/soc/intel/skylake/vr_config.c
+++ b/src/soc/intel/skylake/vr_config.c
@@ -16,6 +16,7 @@
 
 #include <arch/io.h>
 #include <device/pci_ids.h>
+#include <device/pci_ops.h>
 #include <fsp/api.h>
 #include <soc/ramstage.h>
 #include <soc/vr_config.h>