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authorNico Huber <nico.h@gmx.de>2016-09-28 22:15:07 +0200
committerMartin Roth <martinroth@google.com>2016-09-30 18:18:01 +0200
commitbc97b4e37d9825194aa1c103ff643627f21fe31a (patch)
treeaeaba5f4eb7e10df163ce83d88ba6e08a115ceab /src/soc/intel
parent0b9ecb5831bdba869035e70f0773596881a97d27 (diff)
soc/intel/fsp_broadwell_de/uart: Drop it
A copy of our uart8250io driver sneaked in with Broadwell-DE support. The only difference is the lack of initialization (due to FSP handling that). TEST=manually compared resulting object files Change-Id: I09be10b76c76c1306ad2c8db8fb07794dde1b0f2 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/16786 Tested-by: build bot (Jenkins) Reviewed-by: York Yang <york.yang@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/fsp_broadwell_de/Kconfig10
-rw-r--r--src/soc/intel/fsp_broadwell_de/Makefile.inc6
-rw-r--r--src/soc/intel/fsp_broadwell_de/uart.c112
3 files changed, 2 insertions, 126 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig
index 99a2bfd6c2..bedf29120b 100644
--- a/src/soc/intel/fsp_broadwell_de/Kconfig
+++ b/src/soc/intel/fsp_broadwell_de/Kconfig
@@ -61,18 +61,12 @@ config VGA_BIOS
config INTEGRATED_UART
bool "Integrated UART ports"
default y
- select HAVE_UART_SPECIAL
+ select DRIVERS_UART_8250IO
+ select DRIVERS_UART_8250IO_SKIP_INIT
select CONSOLE_SERIAL
help
Use Broadwell-DE Integrated UART ports @3F8h and 2F8h.
-config DRIVERS_UART_8250IO
- bool "Serial port on SuperIO (Broadwell-DE's UART ports unselected)"
- depends on !INTEGRATED_UART
- help
- Select to choose SuperIO's serial port for console output.
- CANNOT select if intend to use SoC integrated serial ports.
-
config CONSOLE_CBMEM
bool "Send console output to a CBMEM buffer"
default n
diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc
index 41ae43e07e..657f70c936 100644
--- a/src/soc/intel/fsp_broadwell_de/Makefile.inc
+++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc
@@ -24,12 +24,6 @@ ramstage-y += acpi.c
ramstage-y += smbus_common.c
ramstage-y += smbus.c
-ifeq ($(CONFIG_INTEGRATED_UART),y)
-romstage-y += uart.c
-ramstage-y += uart.c
-smm-$(CONFIG_DEBUG_SMI) += uart.c
-endif
-
CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/include
CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/fsp
CPPFLAGS_common += -I$(src)/soc/intel/fsp_broadwell_de/
diff --git a/src/soc/intel/fsp_broadwell_de/uart.c b/src/soc/intel/fsp_broadwell_de/uart.c
deleted file mode 100644
index d22dd0dc50..0000000000
--- a/src/soc/intel/fsp_broadwell_de/uart.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2003 Eric Biederman
- * Copyright (C) 2006-2010 coresystems GmbH
- * Copyright (C) 2015-2016 Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <rules.h>
-#include <stdlib.h>
-#include <arch/io.h>
-#include <console/uart.h>
-#include <trace.h>
-#include <drivers/uart/uart8250reg.h>
-
-#ifndef __ROMCC__
-#include <boot/coreboot_tables.h>
-#endif
-
-/* Expected character delay at 1200bps is 9ms for a working UART
- * and no flow-control. Assume UART as stuck if shift register
- * or FIFO takes more than 50ms per character to appear empty.
- *
- * Estimated that inb() from UART takes 1 microsecond.
- */
-#define SINGLE_CHAR_TIMEOUT (50 * 1000)
-#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
-
-static int uart8250_can_tx_byte(unsigned base_port)
-{
- return inb(base_port + UART8250_LSR) & UART8250_LSR_THRE;
-}
-
-static void uart8250_tx_byte(unsigned base_port, unsigned char data)
-{
- unsigned long int i = SINGLE_CHAR_TIMEOUT;
- while (i-- && !uart8250_can_tx_byte(base_port));
- outb(data, base_port + UART8250_TBR);
-}
-
-static void uart8250_tx_flush(unsigned base_port)
-{
- unsigned long int i = FIFO_TIMEOUT;
- while (i-- && !(inb(base_port + UART8250_LSR) & UART8250_LSR_TEMT));
-}
-
-static int uart8250_can_rx_byte(unsigned base_port)
-{
- return inb(base_port + UART8250_LSR) & UART8250_LSR_DR;
-}
-
-static unsigned char uart8250_rx_byte(unsigned base_port)
-{
- unsigned long int i = SINGLE_CHAR_TIMEOUT;
- while (i-- && !uart8250_can_rx_byte(base_port));
-
- if (i)
- return inb(base_port + UART8250_RBR);
- else
- return 0x0;
-}
-
-static const unsigned bases[] = { 0x3f8, 0x2f8 };
-
-uintptr_t uart_platform_base(int idx)
-{
- if (idx < ARRAY_SIZE(bases))
- return bases[idx];
- return 0;
-}
-
-void uart_init(int idx)
-{
- // No needed to configure as setting has been done in BDX-DE FSP
-}
-
-void uart_tx_byte(int idx, unsigned char data)
-{
- uart8250_tx_byte(uart_platform_base(idx), data);
-}
-
-unsigned char uart_rx_byte(int idx)
-{
- return uart8250_rx_byte(uart_platform_base(idx));
-}
-
-void uart_tx_flush(int idx)
-{
- uart8250_tx_flush(uart_platform_base(idx));
-}
-
-#if ENV_RAMSTAGE
-void uart_fill_lb(void *data)
-{
- struct lb_serial serial;
- serial.type = LB_SERIAL_TYPE_IO_MAPPED;
- serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = default_baudrate();
- lb_add_serial(&serial, data);
-
- lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
-}
-#endif