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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2017-09-05 15:48:18 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2017-09-08 10:50:40 +0000 |
| commit | af896d071b5d0c6ffabc1f4a5cda1429fb6754b6 (patch) | |
| tree | d037de4dca5bb38e62aef6f89f284485dfe2ddc1 /src/soc/intel | |
| parent | b83858af5b29ef468f732591269ce7eb471d7591 (diff) | |
siemens/mc_apl1: Disable internal UARTs
APL internal UARTs are not used on this mainboard.
Change-Id: I39118262fc6f37b45785538a3f2d1d31d42cbe86
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/21406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions