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authorAngel Pons <th3fanbus@gmail.com>2020-09-02 18:54:03 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-08 05:26:25 +0000
commitf8d47455f7826913dc8d19663d04c8a5c4c36ba2 (patch)
treeaceb2d02eec8d46de41a00b8fe7eccbc72d1050b /src/soc/intel
parent657edbeea4e754114bf1181f60731020c143ac76 (diff)
soc/intel/broadwell: Drop `gpu_panel_port_select`
The corresponding bits in PP_ON_DELAYS are reserved MBZ. Change-Id: I9789a7d50c4bce2ccad0bf476f877db25e3ff82e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45033 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/broadwell/chip.h1
-rw-r--r--src/soc/intel/broadwell/igd.c1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h
index 554399823a..f559410c57 100644
--- a/src/soc/intel/broadwell/chip.h
+++ b/src/soc/intel/broadwell/chip.h
@@ -84,7 +84,6 @@ struct soc_intel_broadwell_config {
u8 gpu_dp_d_hotplug;
/* Panel power sequence timings */
- u8 gpu_panel_port_select;
u8 gpu_panel_power_cycle_delay;
u16 gpu_panel_power_up_delay;
u16 gpu_panel_power_down_delay;
diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index 41167b1cf9..ba453cdb27 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -298,7 +298,6 @@ static void igd_setup_panel(struct device *dev)
/* Setup Panel Power On Delays */
reg32 = gtt_read(PCH_PP_ON_DELAYS);
if (!reg32) {
- reg32 = (conf->gpu_panel_port_select & 0x3) << 30;
reg32 |= (conf->gpu_panel_power_up_delay & 0x1fff) << 16;
reg32 |= (conf->gpu_panel_power_backlight_on_delay & 0x1fff);
gtt_write(PCH_PP_ON_DELAYS, reg32);