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authorKane Chen <kane.chen@intel.com>2019-04-17 10:42:00 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-04-23 10:08:45 +0000
commitf5e8b29be6fc32ded30f25e4706ea55c42c13b41 (patch)
tree37f42a3e5c3e6bcce331eb57cbc35ace038bcdc6 /src/soc/intel
parent0556f6132b28ff8da45a5a1b4ef4c66e95b5bcb9 (diff)
soc/intel/common: Add SOC_INTEL_DEBUG_CONSENT to control debug interface
SOC_INTEL_DEBUG_CONSENT config is generally to enable default debug interface of SoC. Ex: USB DBC, DCI debug interface on cnl, whl, cml. Change-Id: I313d80d6c63fd37164c63f78e9e69d3cb4a5566b Signed-off-by: Kane Chen <kane.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32337 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/common/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index b5caf40097..318cc25c87 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -68,4 +68,11 @@ config TPM_TIS_ACPI_INTERRUPT
acpi_get_gpe() is used to provide interrupt status to TPM layer.
This option specifies the GPE number.
+config SOC_INTEL_DEBUG_CONSENT
+ bool "Enable SOC debug interface"
+ default n
+ help
+ Set this option to enable default debug interface of SoC such as DBC
+ or DCI.
+
endif # SOC_INTEL_COMMON