diff options
author | Philipp Deppenwiese <zaolin@das-labor.org> | 2017-10-18 20:26:18 +0200 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2018-01-18 01:45:35 +0000 |
commit | d88fb36e61beac7b52b6183385de4434895a4995 (patch) | |
tree | 285f48686df7f318b7b57044991bf70ebd4cd42c /src/soc/intel | |
parent | 64e2d19082636de9e82674ccfca574269bb34712 (diff) |
security/tpm: Change TPM naming for different layers.
* Rename tlcl* to tss* as tpm software stack layer.
* Fix inconsistent naming.
Change-Id: I206dd6a32dbd303a6d4d987e424407ebf5c518fa
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/22104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/romstage/romstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/common/tpm_tis.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index d8e6449dc6..0e8710a903 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -30,7 +30,7 @@ #include <stage_cache.h> #include <string.h> #include <timestamp.h> -#include <security/tpm/tpm.h> +#include <security/tpm/tis.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/gpio.h> #include <soc/iomap.h> diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index 12a15304a2..7cedf90331 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -43,7 +43,7 @@ #include <soc/romstage.h> #include <soc/smm.h> #include <soc/spi.h> -#include <security/tpm/tpm.h> +#include <security/tpm/tis.h> void program_base_addresses(void) { diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index fa4c1eac62..4a1e67dded 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -25,7 +25,7 @@ #include <cbmem.h> #include <cpu/x86/mtrr.h> #include <elog.h> -#include <security/tpm/tpm.h> +#include <security/tpm/tis.h> #include <program_loading.h> #include <romstage_handoff.h> #include <stage_cache.h> diff --git a/src/soc/intel/common/tpm_tis.c b/src/soc/intel/common/tpm_tis.c index f088c0d16a..03089b2528 100644 --- a/src/soc/intel/common/tpm_tis.c +++ b/src/soc/intel/common/tpm_tis.c @@ -14,7 +14,7 @@ */ #include <arch/acpi.h> -#include <security/tpm/tpm.h> +#include <security/tpm/tis.h> int tis_plat_irq_status(void) { |