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authorShelley Chen <shchen@google.com>2020-09-25 09:30:44 -0700
committerShelley Chen <shchen@google.com>2020-10-02 23:11:04 +0000
commit6c2568f4f58b9a1b209c9af36d7f980fde784f08 (patch)
tree99a24554ce5180ff36151940620f13da306d3d99 /src/soc/intel
parentba9f82ed73400abca7ce08c5adcaaf943d200c38 (diff)
drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config
Added new config BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES to accomodate older x86 platforms that don't allow writing to SPI flash when early stages are running XIP from flash. If BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES is not selected, BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY will get auto-selected if BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y. This allows for current platforms that write to flash in the earlier stages, assuming that they have that capability. BUG=b:150502246 BRANCH=None TEST=diff the coreboot.rom files resulting from running ./util/abuild/abuild -p none -t GOOGLE_NAMI -x -a --timeless with and without this change to make sure that there was no difference. Also did this for GOOGLE_CANDY board, which is baytrail based (and has BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES enabled). Change-Id: I3aef8be702f55873233610b8e20d0662aa951ca7 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45740 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/alderlake/Kconfig1
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/soc/intel/baytrail/Kconfig1
-rw-r--r--src/soc/intel/braswell/Kconfig1
-rw-r--r--src/soc/intel/broadwell/Kconfig1
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/denverton_ns/Kconfig1
-rw-r--r--src/soc/intel/elkhartlake/Kconfig1
-rw-r--r--src/soc/intel/icelake/Kconfig1
-rw-r--r--src/soc/intel/jasperlake/Kconfig1
-rw-r--r--src/soc/intel/skylake/Kconfig1
-rw-r--r--src/soc/intel/tigerlake/Kconfig1
-rw-r--r--src/soc/intel/xeon_sp/Kconfig1
13 files changed, 3 insertions, 10 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 553131b46b..8f123504a0 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -11,7 +11,6 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_BOOTBLOCK_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_VERSTAGE_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_COMMON
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index a39e4bb0a8..da57931ad4 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -22,7 +22,6 @@ config CPU_SPECIFIC_OPTIONS
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NO_PCAT_8259
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
# CPU specific options
select CPU_INTEL_COMMON
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 12e195996a..8276da2f12 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
+ select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index c40cafd618..ae4fc21e37 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
+ select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 31f47f7340..15ece2caa2 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
+ select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select MRC_SETTINGS_PROTECT
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index f792e70ec3..b0335cf379 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -75,7 +75,6 @@ config CPU_SPECIFIC_OPTIONS
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NHLT
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_COMMON
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 866d67e50a..798d473cad 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -10,7 +10,6 @@ if SOC_INTEL_DENVERTON_NS
config CPU_SPECIFIC_OPTIONS
def_bool y
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select DEBUG_GPIO
select SOC_INTEL_COMMON
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index ba04a4f46d..1a0bfd25d8 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -9,7 +9,6 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_COMMON
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index 60cb5e5d84..cad3119616 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -9,7 +9,6 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 2282655984..53d6e642f7 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -9,7 +9,6 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_COMMON
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 155df5878d..6bdb615a72 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -20,7 +20,6 @@ config CPU_SPECIFIC_OPTIONS
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_NHLT
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_COMMON
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 7e143c10d7..ac98779e06 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -9,7 +9,6 @@ config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_COMMON
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index 3b18741202..e449409c4f 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -26,7 +26,6 @@ if XEON_SP_COMMON_BASE
config CPU_SPECIFIC_OPTIONS
def_bool y
select ARCH_ALL_STAGES_X86_32
- select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CPU_INTEL_COMMON
select SOC_INTEL_COMMON