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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-06-22 08:06:52 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-06-29 15:50:13 +0000
commit419c6901d91bf5544fd23251266ac0dfc73d14ff (patch)
tree606df50e609f3bfc9a039e1df08ab5f598b61cb3 /src/soc/intel
parent39bd46f4a4f3c1cc76f1007f82050c943fd09bb5 (diff)
soc/amd/common: Refactor GPIO_MASTER_SWITCH interrupt enable
There is no GPIO_63 but the register position is used for interrupt controls. Change-Id: I754a2f6bbee12d637f8c99a9d330ab0ac8187247 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42686 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
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