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authorWenkai Du <wenkai.du@intel.com>2014-11-05 21:10:57 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-18 08:43:22 +0200
commit1006b1020663e5f42d47401bfdf25417793c94b4 (patch)
tree879c866aeaba816f5c2d483f657814052c2a8b0c /src/soc/intel
parent3c6e5dbd70e24592162d5aa5e95a8a6abace4e75 (diff)
broadwell: add ROM stage pre console init call back
Serial port on ITE 8772 SuperIO must be initialized before console_init is called. So the pre console init callback is added to let mainboard code do proper initialization. Change-Id: Iaa3e4b9c6e7ce77a7b9a6b9ecedd8ea54f3141dc Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 71ee2fd470e19fa4854f895678445b05c17761c1 Original-Change-Id: I594e6e4a72f65744deca5cad666eb3b227adeb24 Original-Signed-off-by: Wenkai Du <wenkai.du@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/227933 Original-Reviewed-by: Kenji Chen <kenji.chen@intel.com> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-by: Rajmohan Mani <rajmohan.mani@intel.com> Original-Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/9472 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/broadwell/include/soc/romstage.h1
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c6
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h
index 946d1d0739..b636223561 100644
--- a/src/soc/intel/broadwell/include/soc/romstage.h
+++ b/src/soc/intel/broadwell/include/soc/romstage.h
@@ -57,4 +57,5 @@ int smbus_read_byte(unsigned device, unsigned address);
int early_spi_read(u32 offset, u32 size, u8 *buffer);
int early_spi_read_wpsr(u8 *sr);
+void mainboard_pre_console_init(void);
#endif
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 31d4f889bd..e8a72914b0 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -61,6 +61,10 @@ void * asmlinkage romstage_main(unsigned long bist,
/* PCH Early Initialization */
pch_early_init();
+ /* Call into mainboard pre console init. Needed to enable serial port
+ on IT8772 */
+ mainboard_pre_console_init();
+
/* Start console drivers */
console_init();
@@ -149,4 +153,6 @@ int vboot_get_sw_write_protect(void)
/* Return unprotected status if status read fails. */
return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80));
}
+
#endif
+void __attribute__((weak)) mainboard_pre_console_init(void) {}