src: Remove unneeded include "{arch,cpu}/cpu.h"

Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

54 files changed, 6 insertions, 54 deletions

diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index d796fa0dcf..0c4ff81e82 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -22,7 +22,6 @@
 #include <arch/smp/mpspec.h>
 #include <cbmem.h>
 #include <cpu/x86/smm.h>
-#include <cpu/cpu.h>
 #include <gpio.h>
 #include <intelblocks/acpi.h>
 #include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index bc5c1709fc..ac3e0cc0ea 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -14,7 +14,7 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include <arch/cpu.h>
+
 #include <bootblock_common.h>
 #include <cpu/x86/pae.h>
 #include <device/pci.h>
diff --git a/src/soc/intel/apollolake/car.c b/src/soc/intel/apollolake/car.c
index 920580d0a1..9f75c7e15c 100644
--- a/src/soc/intel/apollolake/car.c
+++ b/src/soc/intel/apollolake/car.c
@@ -15,7 +15,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/cpu.h>
 #include <assert.h>
 #include <cpu/x86/msr.h>
 #include <intelblocks/msr.h>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index e70bfa3b2c..48a509dfb4 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -21,7 +21,6 @@
 #include <bootstate.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/msr.h>
 #include <device/device.h>
diff --git a/src/soc/intel/apollolake/include/soc/romstage.h b/src/soc/intel/apollolake/include/soc/romstage.h
index fe3add6eee..da30de54e5 100644
--- a/src/soc/intel/apollolake/include/soc/romstage.h
+++ b/src/soc/intel/apollolake/include/soc/romstage.h
@@ -18,7 +18,6 @@
 #ifndef _SOC_APOLLOLAKE_ROMSTAGE_H_
 #define _SOC_APOLLOLAKE_ROMSTAGE_H_
 
-#include <arch/cpu.h>
 #include <fsp/api.h>
 
 void set_max_freq(void);
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index cdf3abfed5..336ff69661 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -24,7 +24,6 @@
 #include <console/console.h>
 #include <types.h>
 #include <string.h>
-#include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/tsc.h>
 #include <cpu/intel/turbo.h>
diff --git a/src/soc/intel/baytrail/placeholders.c b/src/soc/intel/baytrail/placeholders.c
index b110f5f416..b476409fc4 100644
--- a/src/soc/intel/baytrail/placeholders.c
+++ b/src/soc/intel/baytrail/placeholders.c
@@ -13,7 +13,6 @@
  */
 
 #include <arch/acpi.h>
-#include <cpu/cpu.h>
 #include <device/pci_rom.h>
 #include <soc/acpi.h>
 
diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c
index 17541f684a..a65e10e55f 100644
--- a/src/soc/intel/baytrail/smm.c
+++ b/src/soc/intel/baytrail/smm.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/io.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/smm.h>
 #include <string.h>
 
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 0ef70d020b..3946c15e5c 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -17,6 +17,7 @@
 #include <stdint.h>
 #include <arch/io.h>
 #include <arch/acpi.h>
+#include <arch/cpu.h>
 #include <bootstate.h>
 #include <cbmem.h>
 #include <console/console.h>
@@ -38,7 +39,6 @@
 #include "chip.h"
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
-#include <cpu/cpu.h>
 
 static inline void
 add_mmio_resource(struct device *dev, int i, unsigned long addr,
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index c11adb9d41..f402f54c66 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -23,7 +23,6 @@
 #include <cbfs.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include <cpu/cpu.h>
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>
diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h
index fc4f864942..8fa9c8a713 100644
--- a/src/soc/intel/braswell/include/soc/romstage.h
+++ b/src/soc/intel/braswell/include/soc/romstage.h
@@ -18,7 +18,6 @@
 #define _SOC_ROMSTAGE_H_
 
 #include <stdint.h>
-#include <arch/cpu.h>
 #include <fsp/romstage.h>
 #include <fsp/util.h>
 #include <soc/pei_data.h>
diff --git a/src/soc/intel/braswell/placeholders.c b/src/soc/intel/braswell/placeholders.c
index 8493e3821e..7e633d9b56 100644
--- a/src/soc/intel/braswell/placeholders.c
+++ b/src/soc/intel/braswell/placeholders.c
@@ -14,7 +14,6 @@
  */
 
 #include <arch/acpi.h>
-#include <cpu/cpu.h>
 #include <device/pci_rom.h>
 #include <soc/acpi.h>
 
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c
index 03f9ac07f1..1cbb20bcfc 100644
--- a/src/soc/intel/braswell/romstage/romstage.c
+++ b/src/soc/intel/braswell/romstage/romstage.c
@@ -18,7 +18,6 @@
 #include <cbmem.h>
 #include <stddef.h>
 #include <arch/early_variables.h>
-#include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/cbfs.h>
 #include <arch/stages.h>
diff --git a/src/soc/intel/braswell/smm.c b/src/soc/intel/braswell/smm.c
index 3a7ab1cb69..ae0d80a8d0 100644
--- a/src/soc/intel/braswell/smm.c
+++ b/src/soc/intel/braswell/smm.c
@@ -17,7 +17,6 @@
 
 #include <arch/io.h>
 #include <console/console.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/soc/intel/broadwell/bootblock/cpu.c b/src/soc/intel/broadwell/bootblock/cpu.c
index 133b1a40d7..7508bc2279 100644
--- a/src/soc/intel/broadwell/bootblock/cpu.c
+++ b/src/soc/intel/broadwell/bootblock/cpu.c
@@ -14,7 +14,6 @@
  */
 
 #include <stdint.h>
-#include <arch/cpu.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/broadwell/cpu_info.c b/src/soc/intel/broadwell/cpu_info.c
index d89c83ee3f..bb438ed51f 100644
--- a/src/soc/intel/broadwell/cpu_info.c
+++ b/src/soc/intel/broadwell/cpu_info.c
@@ -15,7 +15,7 @@
  */
 
 #include <console/console.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
 #include <cpu/x86/msr.h>
 #include <soc/cpu.h>
 #include <soc/msr.h>
diff --git a/src/soc/intel/broadwell/include/soc/cpu.h b/src/soc/intel/broadwell/include/soc/cpu.h
index 4755ba424e..8b0855227c 100644
--- a/src/soc/intel/broadwell/include/soc/cpu.h
+++ b/src/soc/intel/broadwell/include/soc/cpu.h
@@ -16,7 +16,6 @@
 #ifndef _BROADWELL_CPU_H_
 #define _BROADWELL_CPU_H_
 
-#include <arch/cpu.h>
 #include <device/device.h>
 
 /* CPU types */
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index ff7ff81014..8219d5455b 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -22,6 +22,7 @@
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <pc80/i8259.h>
+#include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 3abc853975..cc8bf5d69c 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -15,7 +15,6 @@
 
 #include <stddef.h>
 #include <stdint.h>
-#include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/cbfs.h>
 #include <arch/early_variables.h>
diff --git a/src/soc/intel/broadwell/smi.c b/src/soc/intel/broadwell/smi.c
index c159a759bf..f87b8a2afc 100644
--- a/src/soc/intel/broadwell/smi.c
+++ b/src/soc/intel/broadwell/smi.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/io.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
 #include <string.h>
diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c
index 08b98e9de1..5e95bb4693 100644
--- a/src/soc/intel/broadwell/smmrelocate.c
+++ b/src/soc/intel/broadwell/smmrelocate.c
@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 4fd92415af..84dfdad286 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -17,12 +17,10 @@
 
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
-#include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/smp/mpspec.h>
 #include <cbmem.h>
 #include <chip.h>
-#include <cpu/cpu.h>
 #include <ec/google/chromeec/ec.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/cannonlake/include/soc/cpu.h b/src/soc/intel/cannonlake/include/soc/cpu.h
index 1e3e2b4cb1..0e027d3456 100644
--- a/src/soc/intel/cannonlake/include/soc/cpu.h
+++ b/src/soc/intel/cannonlake/include/soc/cpu.h
@@ -17,7 +17,6 @@
 #ifndef _SOC_CANNONLAKE_CPU_H_
 #define _SOC_CANNONLAKE_CPU_H_
 
-#include <arch/cpu.h>
 #include <device/device.h>
 #include <intelblocks/msr.h>
 
diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h
index 9ea60ae93e..a58ace59a5 100644
--- a/src/soc/intel/cannonlake/include/soc/romstage.h
+++ b/src/soc/intel/cannonlake/include/soc/romstage.h
@@ -17,7 +17,6 @@
 #ifndef _SOC_ROMSTAGE_H_
 #define _SOC_ROMSTAGE_H_
 
-#include <arch/cpu.h>
 #include <fsp/api.h>
 
 void mainboard_memory_init_params(FSPM_UPD *mupd);
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index ebbdabd3e8..62b70be98e 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -20,6 +20,7 @@
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
+#include <arch/cpu.h>
 #include <delay.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
diff --git a/src/soc/intel/common/util.c b/src/soc/intel/common/util.c
index 3aadd6b54e..fadef607c3 100644
--- a/src/soc/intel/common/util.c
+++ b/src/soc/intel/common/util.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 71e396004f..a75a182fd7 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -18,11 +18,11 @@
 
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
+#include <arch/cpu.h>
 #include <arch/smp/mpspec.h>
 #include <cpu/x86/smm.h>
 #include <string.h>
 #include <device/pci.h>
-#include <cpu/cpu.h>
 #include <cbmem.h>
 
 #include <soc/acpi.h>
diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c
index 8b0c356aa0..7325ecb571 100644
--- a/src/soc/intel/denverton_ns/bootblock/bootblock.c
+++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/cpu.h>
 #include <bootblock_common.h>
 #include <cpu/x86/mtrr.h>
 #include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 05dcb76bd3..dfb6d2ee74 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -20,7 +20,6 @@
 #include <cbfs.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include <cpu/cpu.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <fsp/api.h>
diff --git a/src/soc/intel/denverton_ns/include/soc/romstage.h b/src/soc/intel/denverton_ns/include/soc/romstage.h
index 2c6c5ce890..6ec7cbedc4 100644
--- a/src/soc/intel/denverton_ns/include/soc/romstage.h
+++ b/src/soc/intel/denverton_ns/include/soc/romstage.h
@@ -18,7 +18,6 @@
 #ifndef _SOC_DENVERTON_NS_ROMSTAGE_H_
 #define _SOC_DENVERTON_NS_ROMSTAGE_H_
 
-#include <arch/cpu.h>
 #include <fsp/api.h>
 
 /* These functions are weak and can be overridden by a mainboard functions. */
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 0e1a95de45..dbc5eccf96 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -21,7 +21,6 @@
 #include <arch/io.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/smm.h>
 #include <bootstate.h>
 
diff --git a/src/soc/intel/denverton_ns/smm.c b/src/soc/intel/denverton_ns/smm.c
index 732aed4326..9d3fa75a6a 100644
--- a/src/soc/intel/denverton_ns/smm.c
+++ b/src/soc/intel/denverton_ns/smm.c
@@ -20,7 +20,6 @@
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/io.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/smm.h>
 #include <string.h>
 
diff --git a/src/soc/intel/denverton_ns/tsc_freq.c b/src/soc/intel/denverton_ns/tsc_freq.c
index 6bf2a48d13..0e268b3780 100644
--- a/src/soc/intel/denverton_ns/tsc_freq.c
+++ b/src/soc/intel/denverton_ns/tsc_freq.c
@@ -17,7 +17,6 @@
 
 #include <cpu/x86/msr.h>
 #include <cpu/x86/tsc.h>
-#include <arch/cpu.h>
 
 #include <soc/cpu.h>
 #include <soc/msr.h>
diff --git a/src/soc/intel/denverton_ns/upd_display.c b/src/soc/intel/denverton_ns/upd_display.c
index 076ffec8d7..4f4e1bfcf9 100644
--- a/src/soc/intel/denverton_ns/upd_display.c
+++ b/src/soc/intel/denverton_ns/upd_display.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/cpu.h>
 #include <console/console.h>
 #include <fsp/util.h>
 #include <lib.h>
diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c
index 97c8d5b46f..8152bfb5fc 100644
--- a/src/soc/intel/fsp_baytrail/acpi.c
+++ b/src/soc/intel/fsp_baytrail/acpi.c
@@ -43,7 +43,6 @@
 #include <soc/msr.h>
 #include <soc/pattrs.h>
 #include <soc/pmc.h>
-#include <cpu/cpu.h>
 #include <cbmem.h>
 
 #include "chip.h"
diff --git a/src/soc/intel/fsp_baytrail/include/soc/romstage.h b/src/soc/intel/fsp_baytrail/include/soc/romstage.h
index a3fdb7b40a..ce66df8a6a 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/romstage.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/romstage.h
@@ -24,7 +24,6 @@
 void report_platform_info(void);
 
 #include <stdint.h>
-#include <arch/cpu.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 
 void main(FSP_INFO_HEADER *fsp_info_header);
diff --git a/src/soc/intel/fsp_baytrail/placeholders.c b/src/soc/intel/fsp_baytrail/placeholders.c
index 587f0e9e62..e9a8757557 100644
--- a/src/soc/intel/fsp_baytrail/placeholders.c
+++ b/src/soc/intel/fsp_baytrail/placeholders.c
@@ -13,7 +13,6 @@
  */
 
 #include <arch/acpi.h>
-#include <cpu/cpu.h>
 #include <device/pci_rom.h>
 #include <soc/acpi.h>
 
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index fb5962e59c..bc49a418f4 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -15,7 +15,6 @@
  */
 
 #include <stddef.h>
-#include <arch/cpu.h>
 #include <lib.h>
 #include <arch/io.h>
 #include <arch/cbfs.h>
diff --git a/src/soc/intel/fsp_baytrail/smm.c b/src/soc/intel/fsp_baytrail/smm.c
index eb24d219fa..84f8d28d6d 100644
--- a/src/soc/intel/fsp_baytrail/smm.c
+++ b/src/soc/intel/fsp_baytrail/smm.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <console/console.h>
 #include <arch/io.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/smm.h>
 #include <string.h>
 
diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index 6fa2192c52..d62805ff7a 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -42,7 +42,6 @@
 #include "chip.h"
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
-#include <cpu/cpu.h>
 
 #define ENABLE_ACPI_MODE_IN_COREBOOT	0
 #define TEST_SMM_FLASH_LOCKDOWN		0
diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c
index 9c3cae08ac..15ea5eccea 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi.c
+++ b/src/soc/intel/fsp_broadwell_de/acpi.c
@@ -19,7 +19,6 @@
 #include <string.h>
 #include <types.h>
 #include <arch/acpigen.h>
-#include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/smp/mpspec.h>
 #include <console/console.h>
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h b/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
index 94a5a5669c..877b0a0b70 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
@@ -22,7 +22,6 @@
 #endif
 
 #include <stdint.h>
-#include <arch/cpu.h>
 #include <fsp.h>
 
 void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr);
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
index 0f53a79732..801f9e0e5e 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
@@ -16,7 +16,6 @@
  */
 
 #include <stddef.h>
-#include <arch/cpu.h>
 #include <lib.h>
 #include <arch/io.h>
 #include <arch/cbfs.h>
diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
index fe7bc6f1ac..c8a9e004f1 100644
--- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c
+++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
@@ -19,7 +19,6 @@
 #include <types.h>
 #include <string.h>
 #include <device/pci.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c
index be024fe5c5..39ec58a954 100644
--- a/src/soc/intel/icelake/acpi.c
+++ b/src/soc/intel/icelake/acpi.c
@@ -15,12 +15,10 @@
 
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
-#include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/smp/mpspec.h>
 #include <cbmem.h>
 #include <chip.h>
-#include <cpu/cpu.h>
 #include <ec/google/chromeec/ec.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/icelake/include/soc/cpu.h b/src/soc/intel/icelake/include/soc/cpu.h
index 856d685890..1e8d9e86c4 100644
--- a/src/soc/intel/icelake/include/soc/cpu.h
+++ b/src/soc/intel/icelake/include/soc/cpu.h
@@ -16,7 +16,6 @@
 #ifndef _SOC_ICELAKE_CPU_H_
 #define _SOC_ICELAKE_CPU_H_
 
-#include <arch/cpu.h>
 #include <device/device.h>
 #include <intelblocks/msr.h>
 
diff --git a/src/soc/intel/icelake/include/soc/romstage.h b/src/soc/intel/icelake/include/soc/romstage.h
index 1517264d10..e931811302 100644
--- a/src/soc/intel/icelake/include/soc/romstage.h
+++ b/src/soc/intel/icelake/include/soc/romstage.h
@@ -16,7 +16,6 @@
 #ifndef _SOC_ROMSTAGE_H_
 #define _SOC_ROMSTAGE_H_
 
-#include <arch/cpu.h>
 #include <fsp/api.h>
 
 void mainboard_memory_init_params(FSPM_UPD *mupd);
diff --git a/src/soc/intel/quark/include/soc/cpu.h b/src/soc/intel/quark/include/soc/cpu.h
index 1f7bf2cbdb..238f37089d 100644
--- a/src/soc/intel/quark/include/soc/cpu.h
+++ b/src/soc/intel/quark/include/soc/cpu.h
@@ -16,7 +16,6 @@
 #ifndef _QUARK_CPU_H_
 #define _QUARK_CPU_H_
 
-#include <arch/cpu.h>
 #include <device/device.h>
 
 /* Supported CPUIDs */
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 86dcc48e20..6687ea1fa7 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -24,7 +24,6 @@
 #include <cbmem.h>
 #include <chip.h>
 #include <console/console.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/smm.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/tsc.h>
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index cf039d5845..9e4bbe8d4c 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -22,7 +22,6 @@
 #include <device/pci.h>
 #include <string.h>
 #include <chip.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/fsp20/soc/romstage.h
index cdcc8fbc28..364bf52529 100644
--- a/src/soc/intel/skylake/include/fsp20/soc/romstage.h
+++ b/src/soc/intel/skylake/include/fsp20/soc/romstage.h
@@ -17,7 +17,6 @@
 #ifndef _SOC_ROMSTAGE_H_
 #define _SOC_ROMSTAGE_H_
 
-#include <arch/cpu.h>
 #include <fsp/api.h>
 
 void mainboard_memory_init_params(FSPM_UPD *mupd);
diff --git a/src/soc/intel/skylake/include/soc/cpu.h b/src/soc/intel/skylake/include/soc/cpu.h
index cc76b19cd5..0681f78033 100644
--- a/src/soc/intel/skylake/include/soc/cpu.h
+++ b/src/soc/intel/skylake/include/soc/cpu.h
@@ -17,7 +17,6 @@
 #ifndef _SOC_CPU_H_
 #define _SOC_CPU_H_
 
-#include <arch/cpu.h>
 #include <device/device.h>
 
 /* CPU types */
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 215b07c074..8710c5a662 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/cpu.h>
 #include <arch/io.h>
 #include <arch/cbfs.h>
 #include <arch/stages.h>
diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c
index 3db60f9e31..cb4e23fc94 100644
--- a/src/soc/intel/skylake/smmrelocate.c
+++ b/src/soc/intel/skylake/smmrelocate.c
@@ -18,7 +18,6 @@
 #include <string.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>