diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2022-12-25 06:01:09 +0100 |
---|---|---|
committer | Felix Singer <felixsinger@posteo.net> | 2022-12-26 08:50:46 +0000 |
commit | ffc0d2455cc855b315db23f4641ebaf4cc538ea7 (patch) | |
tree | 30fcf9a7933828d37191f808a100b1224b173376 /src/soc/intel | |
parent | 14a0876de826df055f792f2bcfec99df08b5d726 (diff) |
soc/intel/braswell/acpi: Replace Index(a, b) with ASL 2.0 syntax
Change-Id: I7da6ee3c5bce6b32874e59ad46290b86db8f97c6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71502
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/braswell/acpi/dptf/charger.asl | 3 | ||||
-rw-r--r-- | src/soc/intel/braswell/acpi/dptf/dptf.asl | 2 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/braswell/acpi/dptf/charger.asl b/src/soc/intel/braswell/acpi/dptf/charger.asl index 61672ba7ed..68245c9f72 100644 --- a/src/soc/intel/braswell/acpi/dptf/charger.asl +++ b/src/soc/intel/braswell/acpi/dptf/charger.asl @@ -45,8 +45,7 @@ Device (TCHG) Method (SPPC, 1) { /* Retrieve Control (index 4) for specified PPSS level */ - Local0 = DeRefOf (Index (DeRefOf (Index - (\_SB.CHPS, ToInteger (Arg0))), 4)) + Local0 = DerefOf (DerefOf (\_SB.CHPS[ToInteger (Arg0)])[4]) /* Pass Control value to EC to limit charging */ \_SB.PCI0.LPCB.EC0.CHGS (Local0) diff --git a/src/soc/intel/braswell/acpi/dptf/dptf.asl b/src/soc/intel/braswell/acpi/dptf/dptf.asl index 443447cd22..c4d9c61c13 100644 --- a/src/soc/intel/braswell/acpi/dptf/dptf.asl +++ b/src/soc/intel/braswell/acpi/dptf/dptf.asl @@ -36,7 +36,7 @@ Device (DPTF) Method (_OSC, 4, Serialized) { /* Check for Passive Policy UUID */ - If (DeRefOf (Index (IDSP, 0)) == Arg0) { + If (DeRefOf (IDSP[0]) == Arg0) { /* Initialize Thermal Devices */ ^TINI () |