diff options
| author | Teddy Shih <teddyshih@ami.corp-partner.google.com> | 2022-06-24 12:36:06 +0800 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2022-08-03 13:59:42 +0000 |
| commit | ef29befb09278eb4ed74d97a3808d21d0a691fbb (patch) | |
| tree | dfb30c531fefd3bc6aef53ee26e1b73427fa9878 /src/soc/intel | |
| parent | ec1afc58afeedd194dbddddbef4c11e0d1667f03 (diff) | |
mb/google/dedede/var/beadrix: Update SoC gpio pin of BC1.2
Update SoC GPIO setting of adding BC1.2 SLGC55545 according to beadrix
schematics.
GPP_A18 : NC -> NF1 (USB_OC0_N)
BUG=b:214393595, b:226294980
BRANCH=None
TEST=on beadrix, validated by beadrix's Type A working properly.
Signed-off-by: Teddy Shih <teddyshih@ami.corp-partner.google.com>
Change-Id: I746931582cc12f49f7f1c667563350ebac8ddfa1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65377
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Super Ni <super.ni@intel.corp-partner.google.com>
Reviewed-by: Ivan Chen <yulunchen@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions