diff options
author | Subrata Banik <subratabanik@google.com> | 2024-02-15 23:49:36 +0530 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2024-02-18 03:13:45 +0000 |
commit | e29c3e748d83dba01722961cd9947704be05ff6e (patch) | |
tree | 43975e739b0f2366c8ae4bf7a4b0178ea488780f /src/soc/intel | |
parent | c9c88fb598fb450c5171c823a72517087af8fe17 (diff) |
soc/intel/mtl: Skip RW CBFS ucode update if RO is locked
This patch eliminates coreboot from loading microcode from RW CBFS
(when the RO descriptor is locked, which indicates a fixed RO image)
because the kernel can already patch the microcode on BSPs and APs
while booting to OS.
This may be a chance to lower the burden on the AP FW side because
patching microcode on in-field devices is subject to firmware updates,
which are rarely published and, if required, must go through the
firmware qualification testing procedure (which is costly, unlike
kernel updates for ucode updates).
1. The FIT loads the necessary microcode from the RO during reset.
2. Reloading microcode from RW CBFS impacts boot time
(~60ms, core-dependent).
3. The kernel can still load microcode updates.
ChromeOS devices leverage RO+RW-A/RW-B booting. The RO's microcode is
sufficient for initial boot, and the kernel can apply updates later.
BUG=none
TEST=Verified boot optimization; in-field devices skip RW-CBFS microcode
loading when RO is locked.
Change-Id: Ia859809970406fca3fa14e6fa8e766ab16d94c8a
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: YH Lin <yueherngl@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/meteorlake/cpu.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/cpu.c b/src/soc/intel/meteorlake/cpu.c index 54217ea564..e990ae39d7 100644 --- a/src/soc/intel/meteorlake/cpu.c +++ b/src/soc/intel/meteorlake/cpu.c @@ -4,6 +4,7 @@ #include <console/console.h> #include <cpu/cpu.h> #include <cpu/intel/common/common.h> +#include <cpu/intel/microcode.h> #include <cpu/intel/smm_reloc.h> #include <cpu/intel/turbo.h> #include <cpu/x86/lapic.h> @@ -214,3 +215,24 @@ void mp_init_cpus(struct bus *cpu_bus) /* Thermal throttle activation offset */ configure_tcc_thermal_target(); } + +int soc_skip_ucode_update(u32 current_patch_id, u32 new_patch_id) +{ + if (!CONFIG(CHROMEOS)) + return 0; + /* + * Locked RO Descriptor Implications: + * + * - A locked descriptor signals the RO binary is fixed; the FIT will load the + * RO's microcode during system reset. + * - Attempts to load newer microcode from the RW CBFS will cause a boot-time + * delay (~60ms, core-dependent), as the microcode must be reloaded on BSP+APs. + * - The kernel can load microcode updates without impacting AP FW boot time. + * - Skipping RW CBFS microcode loading is low-risk when the RO is locked, + * prioritizing fast boot times. + */ + if (CONFIG(LOCK_MANAGEMENT_ENGINE) && current_patch_id) + return 1; + + return 0; +} |