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authorTim Chu <Tim.Chu@quantatw.com>2022-10-19 06:24:21 +0000
committerFelix Held <felix-coreboot@felixheld.de>2022-10-25 15:12:36 +0000
commite27e1c1c6389e0a4d87c97dfef14068bfc7ddde6 (patch)
treed1b6a69811df70b8f2ec0a66434d489de5050e27 /src/soc/intel
parent5e5335da685482bc790fffe22f1b9aab6e416248 (diff)
soc/intel/xeon_sp: Add functions to store/restore uart state in smm
When CONFIG_DEBUG_SMI is enabled SMM handler performs console hardware initialization that may interfere with OS. Here we store the state before console initialization and restore state before SMM exit. Tested=On not public yet system, after exiting smm, uart console can still work well. Signed-off-by: Tim Chu <Tim.Chu@quantatw.com> Change-Id: Ifa5042c24f0e3217a75971d9e6067b1d1f56a484 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68567 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/xeon_sp/smihandler.c43
1 files changed, 43 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/smihandler.c b/src/soc/intel/xeon_sp/smihandler.c
index 1c04b95d73..d644447aee 100644
--- a/src/soc/intel/xeon_sp/smihandler.c
+++ b/src/soc/intel/xeon_sp/smihandler.c
@@ -1,12 +1,55 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/io.h>
#include <console/console.h>
+#include <console/uart.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
+#include <drivers/uart/uart8250reg.h>
#include <intelblocks/smihandler.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
+struct uart8250_state {
+ uint8_t IER, IIR, MCR, LCR, DLL, DLM;
+};
+
+static struct uart8250_state s_uart8250_state;
+
+static void uart8250_store(unsigned int base_port)
+{
+ /* Save previous state for restoring later. */
+ s_uart8250_state.IER = inb(base_port + UART8250_IER);
+ s_uart8250_state.IIR = inb(base_port + UART8250_FCR);
+ s_uart8250_state.MCR = inb(base_port + UART8250_MCR);
+ s_uart8250_state.LCR = inb(base_port + UART8250_LCR);
+ s_uart8250_state.DLL = inb(base_port + UART8250_DLL);
+ s_uart8250_state.DLM = inb(base_port + UART8250_DLM);
+}
+
+void smm_soc_early_init(void)
+{
+ if (CONFIG(DRIVERS_UART_8250IO) && CONFIG(DEBUG_SMI))
+ uart8250_store(uart_platform_base(CONFIG_UART_FOR_CONSOLE));
+}
+
+static void uart8250_restore(unsigned int base_port)
+{
+ outb(s_uart8250_state.DLL, base_port + UART8250_DLL);
+ outb(s_uart8250_state.DLM, base_port + UART8250_DLM);
+ outb(s_uart8250_state.MCR, base_port + UART8250_MCR);
+ outb(s_uart8250_state.LCR, base_port + UART8250_LCR);
+ if ((s_uart8250_state.IIR & UART8250_IIR_FIFO_EN) == UART8250_IIR_FIFO_EN)
+ outb(UART8250_FCR_FIFO_EN, base_port + UART8250_FCR);
+ outb(s_uart8250_state.IER, base_port + UART8250_IER);
+}
+
+void smm_soc_exit(void)
+{
+ if (CONFIG(DRIVERS_UART_8250IO) && CONFIG(DEBUG_SMI))
+ uart8250_restore(uart_platform_base(CONFIG_UART_FOR_CONSOLE));
+}
+
/*
* Specific SOC SMI handler during ramstage finalize phase
*/