diff options
author | Subrata Banik <subratabanik@google.com> | 2022-04-13 19:41:43 +0530 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2022-04-19 05:44:58 +0000 |
commit | e0b7423d671b4e310577e150fbaf4cd4c9ff89f2 (patch) | |
tree | 46d95ade683c2f9342d5ab55e93e5c0975fe66f0 /src/soc/intel | |
parent | 0e4ca759f401d7f60d7b14dbaf0c6cb3955b8f2c (diff) |
soc/intel/cmn/fast_spi: Use tab instead space
This patch converts whitespace into tabs to maintain the uniformity
across theĀ fast_spi_def.h file.
BUG=b:211954778
TEST=Able to build google/brya.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I56bcd263c6a5c0036e459926a25538e3448fbce6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi_def.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_def.h b/src/soc/intel/common/block/fast_spi/fast_spi_def.h index 353c89f7b7..f28865d9b3 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi_def.h +++ b/src/soc/intel/common/block/fast_spi/fast_spi_def.h @@ -140,9 +140,9 @@ #define SPIBAR_PTINX_IDX_MASK 0xffc /* Register Offsets of BIOS Flash Program Registers */ -#define SPIBAR_RESET_LOCK 0xf0 -#define SPIBAR_RESET_CTRL 0xf4 -#define SPIBAR_RESET_DATA 0xf8 +#define SPIBAR_RESET_LOCK 0xf0 +#define SPIBAR_RESET_CTRL 0xf4 +#define SPIBAR_RESET_DATA 0xf8 /* Programmable values of Bit0 (SSL) of Set STRAP MSG LOCK (0xF0) Register */ #define SPIBAR_RESET_LOCK_DISABLE 0 /* Set_Strap Lock(SSL) Bit 0 = 0 */ |