diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-08-01 11:00:17 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-08-02 04:34:26 +0000 |
| commit | d19b3ca90d50e8b1d11e153d913f0eceaf8552a0 (patch) | |
| tree | 48b13949aa3a78186d6c069916b639fce4026fc0 /src/soc/intel | |
| parent | c077b2274b661fb57ffed66b105ece88e30c73b2 (diff) | |
soc/intel/icelake: Make use of common thermal code for ICL
This patch ports CB:34522 and CB:33147 changes from CNL to ICL.
TEST=Build and boot dragonegg
Change-Id: I0b983005f16fe182e634eac63fef4f6b22197a85
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34649
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/icelake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/icelake/finalize.c | 10 |
2 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 99000bb82b..3ad50cfe5a 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -51,6 +51,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP + select SOC_INTEL_COMMON_BLOCK_THERMAL select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_RESET select SSE2 diff --git a/src/soc/intel/icelake/finalize.c b/src/soc/intel/icelake/finalize.c index c969f3b6e8..086787d9df 100644 --- a/src/soc/intel/icelake/finalize.c +++ b/src/soc/intel/icelake/finalize.c @@ -23,6 +23,7 @@ #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <intelblocks/tco.h> +#include <intelblocks/thermal.h> #include <reg_script.h> #include <spi-generic.h> #include <soc/p2sb.h> @@ -63,6 +64,15 @@ static void pch_finalize(void) tco_lockdown(); /* + * Set low maximum temp threshold value used for dynamic thermal sensor + * shutdown consideration. + * + * If Dynamic Thermal Shutdown is enabled then PMC logic shuts down the + * thermal sensor when CPU is in a C-state and DTS Temp <= LTT. + */ + pch_thermal_configuration(); + + /* * Disable ACPI PM timer based on dt policy * * Disabling ACPI PM timer is necessary for XTAL OSC shutdown. |