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authorWim Vervoorn <wvervoorn@eltan.com>2019-12-17 14:10:16 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-12-19 17:49:38 +0000
commitd1371508f525542f3b75de553dc338b9100bde20 (patch)
treeaab4d1e4c3bf07d3aac5192a8d3d2b49ddd8fa07 /src/soc/intel
parent53490444f72605f53c81e3bdbf479d1013a2d617 (diff)
{drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoC
FSP logo handling used FspsConfig.LogoPtr and FspsConfig.LogoSize which are chipset specific. Create soc_load_logo() which will pass the logo pointer and size. This function will call fsp_load_logo which will load the logo. BUG=NA TEST= Build and verified logo is displayed on Facebook Monolith Change-Id: I30c7bdc0532ff8823e06f4136f210b542385d5ce Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37792 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/soc/intel/apollolake/chip.c6
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/cannonlake/fsp_params.c7
-rw-r--r--src/soc/intel/skylake/Kconfig1
-rw-r--r--src/soc/intel/skylake/chip.c7
6 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index a39765f8f6..2f4ebb0540 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -102,6 +102,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_CF9_RESET_PREPARE
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select HAVE_FSP_GOP
+ select HAVE_FSP_LOGO_SUPPORT
select NO_UART_ON_SUPERIO
select INTEL_GMA_ACPI
select INTEL_GMA_SWSMISCI
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 6c195bb6fd..907149a829 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -879,4 +879,10 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *silconfig)
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
+/* Handle FSP logo params */
+const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd)
+{
+ return fsp_load_logo(&supd->FspsConfig.LogoPtr, &supd->FspsConfig.LogoSize);
+}
+
BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, spi_flash_init_cb, NULL);
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 8820508259..26bae068df 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -66,6 +66,7 @@ config CPU_SPECIFIC_OPTIONS
select FSP_M_XIP
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
+ select HAVE_FSP_LOGO_SUPPORT
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index dfc7e22522..dc4a2a841e 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -483,3 +484,9 @@ const pci_devfn_t *soc_lpss_controllers_list(size_t *size)
*size = ARRAY_SIZE(serial_io_dev);
return serial_io_dev;
}
+
+/* Handle FSP logo params */
+const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd)
+{
+ return fsp_load_logo(&supd->FspsConfig.LogoPtr, &supd->FspsConfig.LogoSize);
+}
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 5fc2a2d240..d90fb6b9fb 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -33,6 +33,7 @@ config CPU_SPECIFIC_OPTIONS
select FSP_M_XIP
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
+ select HAVE_FSP_LOGO_SUPPORT
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
select INTEL_CAR_NEM_ENHANCED
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index de11a9e1c7..8e86156a07 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -15,6 +15,7 @@
#include <bootmode.h>
#include <bootstate.h>
+#include <cbmem.h>
#include <fsp/api.h>
#include <arch/acpi.h>
#include <console/console.h>
@@ -416,3 +417,9 @@ __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
+
+/* Handle FSP logo params */
+const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd)
+{
+ return fsp_load_logo(&supd->FspsConfig.LogoPtr, &supd->FspsConfig.LogoSize);
+}