diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2021-10-08 17:04:10 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-14 13:10:17 +0000 |
| commit | d086e3d6e42036b1ec0fc2173db5386279ac838b (patch) | |
| tree | 6ce0defd0eb24c53830f98fbf00d8ed895499967 /src/soc/intel | |
| parent | e7f43502b540a42f23a967b6206370050ef75f23 (diff) | |
mb/google/guybrush: Assert WWAN_AUX_RST_L on S0i3 entry
Currently WWAN_AUX_RST_L is in S5 domain and does not get asserted on
S0i3 entry. Based on the schematics, the pull-down on that signal leads
to 10 mW power leakage on S0i3 entry. Assert the signal on S0i3 entry to
achieve some power savings and de-assert it on S0i3 exit.
BUG=b:195748540
TEST=Build and boot to OS in Guybrush. Ensure that the signal gets
asserted on S0i3 entry and de-asserted on S0i3 exit. Trigger
suspend/resume cycles and ensure that the WWAN module is enumerated
after each cycle.
Change-Id: I43c8655ee5209779748e4365db973e094cb08aca
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58275
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions