diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2022-07-27 15:23:37 +0100 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-08-17 19:48:11 +0000 |
| commit | b660f4ee47ac2eab478a541af5f0e9217236ae22 (patch) | |
| tree | 0d6d7aad643313eac9b5a37bba5bd139b8772595 /src/soc/intel | |
| parent | acb4d72fff2f67e182d8fb0354fa269d26800b76 (diff) | |
soc/intel/apollolake: Enable DPTF & SMBus as it is a required device
coreboot is unable to disable certain devices, whilst many are hidden
DPTF and SMBus are not. Set this to enabled chipset so that it is
enabled by default.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I85d74179b6fe3c6126566422f82f7b806f80d0c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/chipset_apl.cb | 2 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/chipset_glk.cb | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/chipset_apl.cb b/src/soc/intel/apollolake/chipset_apl.cb index 3930ed273f..8a1b5018b6 100644 --- a/src/soc/intel/apollolake/chipset_apl.cb +++ b/src/soc/intel/apollolake/chipset_apl.cb @@ -1,7 +1,7 @@ chip soc/intel/apollolake device domain 0 on device pci 00.0 alias system_agent on end # Host Bridge - device pci 00.1 alias dptf off end # DPTF + device pci 00.1 alias dptf on end # DPTF device pci 00.2 alias npk off end # NorthPeak device pci 02.0 alias igd off end # Integrated Graphics Device device pci 03.0 alias iunit off end # iUnit diff --git a/src/soc/intel/apollolake/chipset_glk.cb b/src/soc/intel/apollolake/chipset_glk.cb index c8af3d06a1..00436302fb 100644 --- a/src/soc/intel/apollolake/chipset_glk.cb +++ b/src/soc/intel/apollolake/chipset_glk.cb @@ -1,7 +1,7 @@ chip soc/intel/apollolake device domain 0 on device pci 00.0 alias system_agent on end # Host Bridge - device pci 00.1 alias dptf off end # DPTF + device pci 00.1 alias dptf on end # DPTF device pci 00.2 alias npk off end # NorthPeak device pci 02.0 alias igd off end # Integrated Graphics Device device pci 03.0 alias gmm off end # GMM @@ -44,6 +44,6 @@ chip soc/intel/apollolake device pci 1d.0 alias ufs off end # UFS device pci 1e.0 alias sdio off end # SDIO device pci 1f.0 alias lpc_espi on end # LPC - device pci 1f.1 alias smbus off end # SMBUS + device pci 1f.1 alias smbus on end # SMBUS end end |