diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2021-07-23 16:15:57 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-08-15 07:12:41 +0000 |
| commit | ad08265740cecef94bf7fd895221aceb0fcd28b7 (patch) | |
| tree | 540583de51618b8b7f13b64f0bb36a66416cc24f /src/soc/intel | |
| parent | baf922c7989ed969a8f267b7b5fa1cd9dc05acde (diff) | |
soc/intel/tigerlake: Select SF_MASK_2WAYS_PER_BIT if eNEM is enable
As per TGL EDS doc:575681, two ways will be controlled with one bit
of SF QoS register(SF Mask#1/#2) hence, selects SF_MASK_2WAYS_PER_BIT
for TGL SoC.
Change-Id: Ibeef653e0c510b62880b10b3f9767664d89c9623
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56568
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 901570336f..e337e34f10 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -28,6 +28,7 @@ config CPU_SPECIFIC_OPTIONS select INTEL_CAR_NEM_ENHANCED if !INTEL_CAR_NEM select CAR_HAS_SF_MASKS if INTEL_CAR_NEM_ENHANCED select COS_MAPPED_TO_MSB if INTEL_CAR_NEM_ENHANCED + select SF_MASK_2WAYS_PER_BIT if INTEL_CAR_NEM_ENHANCED select INTEL_GMA_ACPI select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select IOAPIC |