diff options
| author | Nico Huber <nico.huber@secunet.com> | 2019-02-01 14:20:37 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-05 13:27:22 +0000 |
| commit | aa4d9b94fd1c84f9dc73a029a8eae4743cec8da4 (patch) | |
| tree | 1742aa5871a5bc6688f53fc3402b2a2cdf4155c9 /src/soc/intel | |
| parent | 53229425c72fd702d980a0b363becf6f2516e69f (diff) | |
soc/intel/apl: Call mca_configure() on cold boots only
By APL BIOS Spec, we must not do this on warm boots.
The TODO comment seems stale and copied over. So the actual
requirements for SGX are unknown and we add a guard for that
case.
Change-Id: I09b4a2fe22267d7318951aac20a3ea566403492e
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/31200
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/cpu.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index bcec28e514..d1c5f6f406 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -17,6 +17,7 @@ * GNU General Public License for more details. */ +#include <arch/acpi.h> #include <assert.h> #include <console/console.h> #include "chip.h" @@ -70,10 +71,11 @@ static const struct reg_script core_msr_script[] = { void soc_core_init(struct device *cpu) { /* Clear out pending MCEs */ - /* TODO(adurbin): This should only be done on a cold boot. Also, some - * of these banks are core vs package scope. For now every CPU clears - * every bank. */ - mca_configure(NULL); + /* TODO(adurbin): Some of these banks are core vs package + scope. For now every CPU clears every bank. */ + if (IS_ENABLED(SOC_INTEL_COMMON_BLOCK_SGX) || + acpi_get_sleep_type() == ACPI_S5) + mca_configure(NULL); /* Set core MSRs */ reg_script_run(core_msr_script); |