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authorJeremy Compostella <jeremy.compostella@intel.com>2024-02-16 14:21:31 -0800
committerMartin L Roth <gaumless@gmail.com>2024-03-09 23:45:00 +0000
commita49dafc7d2de4ee0e24bd72d19f80d36218348bb (patch)
tree3df6085218e201d634dd90c6df66e2435799770c /src/soc/intel
parentc8d47169f43da95fcf8a8c385d49e0a464e58a97 (diff)
soc/intel/common/mp_init: Fix USE_INTEL_FSP_MP_INIT use-case
Commit 829e8e65b939 ("soc/intel: Use common codeflow for MP init") brokes `USE_INTEL_FSP_MP_INIT' by making `init_cpus' function static. This function needs to be accessible from src/drivers/intel/fsp2_0/fsp_mpinit.c. TEST=Verified on Meteor Lake rex board Change-Id: Idb8cdfef7b4279da2c7dff344c95fe446a605934 Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80575 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c2
-rw-r--r--src/soc/intel/common/block/include/intelblocks/mp_init.h10
2 files changed, 11 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 3cff6215d4..7abbb4063e 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -147,7 +147,7 @@ void get_microcode_info(const void **microcode, int *parallel)
* creation of the new node will be skipped. This node will have the APIC ID defined
* in devicetree.
*/
-static void init_cpus(void)
+void init_cpus(void)
{
struct device *dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
assert(dev != NULL);
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index f7cdf87334..0dd2109e4a 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -24,6 +24,16 @@ int get_cpu_count(void);
void get_microcode_info(const void **microcode, int *parallel);
/*
+ * Perform BSP and AP initialization
+ * This function can be called in below cases
+ * 1. During coreboot is doing MP initialization as part of BS_DEV_INIT_CHIPS (exclude
+ * this call if user has selected USE_INTEL_FSP_MP_INIT)
+ * 2. coreboot would like to take APs control back after FSP-S has done with MP
+ * initialization based on user select USE_INTEL_FSP_MP_INIT
+ */
+void init_cpus(void);
+
+/*
* This function will perform any recommended CPU (BSP and AP) initialization
* after coreboot has done the multiprocessor initialization (before FSP-S)
* and prior to coreboot perform post_cpus_init (after DRAM resources are set).