diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2022-08-26 11:02:36 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-08-31 18:27:21 +0000 |
| commit | 9e86b71e7936fd17a2b6d2c15ccd81442f21c576 (patch) | |
| tree | e2ace76e5112d6a2ed4e91a4c4d4d6ca91f4b1e9 /src/soc/intel | |
| parent | 95ed81e4ba57c6fab09a461c79dd9e329d86737a (diff) | |
soc/intel/alderlake: Add new pcie5 alias for raptorlake
Pcie5_1 is added for DID 0xA72Dh and BDF 0/1/1.
References:
RaptorLake External Design Specification Volume 1 (640555)
BUG=b:229134437
BRANCH=firmware-brya-14505.B
TEST=Boot to OS
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Id7440bf202d5560ff92807877d48b94054cb1de9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67108
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/chipset.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb index 3f70b3090a..0016ae745f 100644 --- a/src/soc/intel/alderlake/chipset.cb +++ b/src/soc/intel/alderlake/chipset.cb @@ -93,6 +93,7 @@ chip soc/intel/alderlake device gpio 0 alias pch_gpio on end device pci 00.0 alias system_agent on end device pci 01.0 alias pcie5_0 off end + device pci 01.1 alias pcie5_1 off end device pci 02.0 alias igpu off end device pci 04.0 alias dtt off end device pci 05.0 alias ipu off end |