diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2016-04-20 14:19:53 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-05-09 08:28:57 +0200 |
| commit | 9a8b67d0af6a175e6a559e66893f5c29b8d70bf8 (patch) | |
| tree | 2b7806f9bb06c51ac32518a1287380e6a0d8c579 /src/soc/intel | |
| parent | e09b5f2d4f5bca48b0e7b5d7058fc93ed007cdd8 (diff) | |
soc/intel/skylake: Enable another VR mailbox command for certain boards
Command List:
Send command for PS4 exit fails
BUG=chrome-os-partner:52355
BRANCH=glados
TEST=Build and boot lars and verify no hang during active idle
CQ-DEPEND=CL:*257305
Change-Id: I9ffae71b1a38433ffc48ee7be7e2a13e69ad5b87
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 96f00e2d153f92339c378ce256eb7ce6824e3368
Original-Change-Id: I320ae154f3f7145811b57258ddb61b3beb584273
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/341330
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14688
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/skylake/chip.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index ca902ae0ce..857d8a15db 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -330,9 +330,10 @@ struct soc_intel_skylake_config { u8 speed_shift_enable; /* * Enable VR specific mailbox command - * When set, an extra VR mailbox command specifically - * for the MPS IMPV8 VR will be sent. - * 0 - Don't Send, 1 - Send + * 000b - Don't Send any VR command + * 001b - VR command specifically for the MPS IMPV8 VR will be sent + * 010b - VR specific command sent for PS4 exit issue + * 011b - VR specific command sent for both MPS IMPV8 & PS4 exit issue */ u8 SendVrMbxCmd; /* Statically clock gate 8254 PIT. */ |