diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2021-07-14 13:11:53 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-07-15 14:03:40 +0000 |
| commit | 7b8d11b1869dfcf5e8cae464d29504438b87f964 (patch) | |
| tree | b412ce51fc486f7fe087f7894df20e1990421e83 /src/soc/intel | |
| parent | c06aa3ac22656a22a6bea26c2311e29926f821af (diff) | |
soc/intel/alderlake: Use `is_devfn_enabled()` for Crashlog UPDs
Enable FSP Crashlog UPDs if SA_DEVFN_TMT is enabled and
SOC_INTEL_CRASHLOG is selected by the SoC user.
Change-Id: I0244e2a3f9c000a5c6ecdade1419aa47f51b1e80
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56298
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index f9b3d6022d..b32831ede7 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -305,10 +305,8 @@ static void fill_fspm_trace_params(FSP_M_CONFIG *m_cfg, m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT; /* CrashLog config */ - if (CONFIG(SOC_INTEL_CRASHLOG)) { - m_cfg->CpuCrashLogDevice = 1; - m_cfg->CpuCrashLogEnable = 1; - } + m_cfg->CpuCrashLogDevice = CONFIG(SOC_INTEL_CRASHLOG) && is_devfn_enabled(SA_DEVFN_TMT); + m_cfg->CpuCrashLogEnable = m_cfg->CpuCrashLogDevice; } static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, |