diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2018-01-25 11:41:04 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2018-01-31 05:56:19 +0000 |
| commit | 74558813c020cafb9c10894881795b67d4dfb6c8 (patch) | |
| tree | 3b9a0e4f0f3e4c83d53e50620a1878acd58ed40a /src/soc/intel | |
| parent | 8b9f28994a1b5702ce33e62e55d1595b1a056892 (diff) | |
drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver
Now SOC code can select the require UDK support package for any
platform going forward with FSP2.0 model.
Change-Id: Ie6d1b9133892c59210a659ef0ad4b59ebf9f1e45
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/23426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 1 |
4 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index bd6f645c79..b7f2dc92c4 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -98,6 +98,8 @@ config CPU_SPECIFIC_OPTIONS select TSC_MONOTONIC_TIMER select HAVE_MONOTONIC_TIMER select PLATFORM_USES_FSP2_0 + select UDK_2015_BINDING if !SOC_INTEL_GLK + select UDK_2017_BINDING if SOC_INTEL_GLK select HAVE_HARD_RESET select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP select HAVE_FSP_GOP diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 8eee6f4fdd..a131ad4547 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -75,6 +75,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER select UDELAY_TSC + select UDK_2017_BINDING config UART_DEBUG bool "Enable UART debug port." diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index cb13f3f56b..8d9a55002f 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -1,7 +1,7 @@ ## ## This file is part of the coreboot project. ## -## Copyright (C) 2014 - 2017 Intel Corporation. +## Copyright (C) 2014 - 2018 Intel Corporation. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -50,6 +50,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE select UDELAY_TSC + select UDK_2015_BINDING config FSP_T_ADDR hex "Intel FSP-T (temp ram init) binary location" diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 794b8e946f..a486bd6574 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -104,6 +104,7 @@ config USE_FSP2_0_DRIVER def_bool y depends on MAINBOARD_USES_FSP2_0 select PLATFORM_USES_FSP2_0 + select UDK_2015_BINDING select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP select POSTCAR_CONSOLE select POSTCAR_STAGE |