diff options
| author | Felix Singer <felixsinger@posteo.net> | 2021-05-03 02:28:16 +0200 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-08-12 21:42:01 +0000 |
| commit | 673e6d1c67270677edb6c9af28835a15dcaa22ff (patch) | |
| tree | 29e8571bf750555c4306efc4d08e6cbb72fecfc3 /src/soc/intel | |
| parent | 5385b4daa89cdf4077bce91f917f63ea7b82438c (diff) | |
soc/intel/tigerlake: Clean up FSP chipset lockdown configuration
Use a variable to store if the FSP should be responsible for the chipset
lockdown and use it for setting related configuration options. Thus, get
rid of that if-else-clause.
Change-Id: I0580fb3ec9daafac273dcb091f48ce403c22e8f8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52844
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/tigerlake/fsp_params.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index c788fc409f..a3ce68abc7 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -393,17 +393,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->DisableTccoldOnUsbConnected = 1; /* Chipset Lockdown */ - if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) { - params->PchLockDownGlobalSmi = 0; - params->PchLockDownBiosInterface = 0; - params->PchUnlockGpioPads = 1; - params->RtcMemoryLock = 0; - } else { - params->PchLockDownGlobalSmi = 1; - params->PchLockDownBiosInterface = 1; - params->PchUnlockGpioPads = 0; - params->RtcMemoryLock = 1; - } + const bool lockdown_by_fsp = get_lockdown_config() == CHIPSET_LOCKDOWN_FSP; + params->PchLockDownGlobalSmi = lockdown_by_fsp; + params->PchLockDownBiosInterface = lockdown_by_fsp; + params->PchUnlockGpioPads = !lockdown_by_fsp; + params->RtcMemoryLock = lockdown_by_fsp; /* coreboot will send EOP before loading payload */ params->EndOfPostMessage = EOP_DISABLE; |