diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-06-23 16:14:56 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2022-08-14 10:53:47 +0000 |
commit | 4a8cb30222a34de760d38c7d13d54e24221d9fec (patch) | |
tree | 66036e3c07862166c9ae78acac453e4242c07d11 /src/soc/intel | |
parent | ae626d30355b4744762d2c434e159ba9c3998783 (diff) |
soc/intel/broadwell: Consolidate SPD handling
Mainboards do not need to know about `pei_data` to tell northbridge code
where to find the SPD data. As done on Haswell, add the `mb_get_spd_map`
function and the `struct spd_info` type to retrieve SPD information from
mainboard code without having to use `pei_data` in said mainboard code.
Unlike Haswell MRC, Broadwell MRC uses all positions of the `spd_data`
array, not just the first. The placeholder SPD address for memory-down
seems to be different as well. Adapt the existing code to handle these
variations. Once complete, the abstraction layer for both MRC binaries
will have the same API.
Change-Id: I92a05003a319c354675368cae8e34980bd2f9e10
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/broadwell/include/soc/pei_wrapper.h | 11 | ||||
-rw-r--r-- | src/soc/intel/broadwell/raminit.c | 23 | ||||
-rw-r--r-- | src/soc/intel/broadwell/spd.c | 17 |
3 files changed, 35 insertions, 16 deletions
diff --git a/src/soc/intel/broadwell/include/soc/pei_wrapper.h b/src/soc/intel/broadwell/include/soc/pei_wrapper.h index bd12a2b08c..80222beccd 100644 --- a/src/soc/intel/broadwell/include/soc/pei_wrapper.h +++ b/src/soc/intel/broadwell/include/soc/pei_wrapper.h @@ -28,12 +28,17 @@ static inline void pei_data_usb3_port(struct pei_data *pei_data, int port, #define SPD_MEMORY_DOWN 0xff -#define SPD_LEN 256 +struct spd_info { + uint8_t addresses[4]; + unsigned int spd_index; +}; + +/* Mainboard callback to fill in the SPD addresses */ +void mb_get_spd_map(struct spd_info *spdi); void broadwell_fill_pei_data(struct pei_data *pei_data); void mainboard_fill_pei_data(struct pei_data *pei_data); -void mainboard_fill_spd_data(struct pei_data *pei_data); -void fill_spd_for_index(uint8_t spd[], unsigned int spd_index); +void copy_spd(struct pei_data *pei_data, struct spd_info *spdi); #endif diff --git a/src/soc/intel/broadwell/raminit.c b/src/soc/intel/broadwell/raminit.c index 70f38043cd..686c782e2e 100644 --- a/src/soc/intel/broadwell/raminit.c +++ b/src/soc/intel/broadwell/raminit.c @@ -183,9 +183,9 @@ static void setup_sdram_meminfo(struct pei_data *pei_data) * 2 = disable dimm 1 on channel * 3 = disable dimm 0+1 on channel */ -static int make_channel_disabled_mask(const struct pei_data *pd, int ch) +static int make_channel_disabled_mask(const struct spd_info *spdi, int ch) { - return (!pd->spd_addresses[ch + ch] << 0) | (!pd->spd_addresses[ch + ch + 1] << 1); + return (!spdi->addresses[ch + ch] << 0) | (!spdi->addresses[ch + ch + 1] << 1); } void perform_raminit(const struct chipset_power_state *const power_state) @@ -195,15 +195,22 @@ void perform_raminit(const struct chipset_power_state *const power_state) struct pei_data pei_data = { 0 }; mainboard_fill_pei_data(&pei_data); - mainboard_fill_spd_data(&pei_data); + + /* Obtain the SPD addresses from mainboard code */ + struct spd_info spdi = { 0 }; + mb_get_spd_map(&spdi); + + if (CONFIG(HAVE_SPD_IN_CBFS)) + copy_spd(&pei_data, &spdi); /* Calculate unimplemented DIMM slots for each channel */ - pei_data.dimm_channel0_disabled = make_channel_disabled_mask(&pei_data, 0); - pei_data.dimm_channel1_disabled = make_channel_disabled_mask(&pei_data, 1); + pei_data.dimm_channel0_disabled = make_channel_disabled_mask(&spdi, 0); + pei_data.dimm_channel1_disabled = make_channel_disabled_mask(&spdi, 1); - for (size_t i = 0; i < ARRAY_SIZE(pei_data.spd_addresses); i++) { - const uint8_t addr = pei_data.spd_addresses[i]; - pei_data.spd_addresses[i] = addr == SPD_MEMORY_DOWN ? 0 : addr; + /* MRC expects left-aligned SMBus addresses, and 0 for memory-down */ + for (size_t i = 0; i < ARRAY_SIZE(spdi.addresses); i++) { + const uint8_t addr = spdi.addresses[i]; + pei_data.spd_addresses[i] = addr == SPD_MEMORY_DOWN ? 0 : addr << 1; } post_code(0x32); diff --git a/src/soc/intel/broadwell/spd.c b/src/soc/intel/broadwell/spd.c index 97cac38f9c..1af66f1d67 100644 --- a/src/soc/intel/broadwell/spd.c +++ b/src/soc/intel/broadwell/spd.c @@ -17,6 +17,8 @@ #define SPD_PART_OFF 128 #define SPD_PART_LEN 18 +#define SPD_LEN 256 + static void print_spd_info(uint8_t spd[]) { const int spd_banks[8] = { 8, 16, 32, 64, -1, -1, -1, -1 }; @@ -67,12 +69,12 @@ static void print_spd_info(uint8_t spd[]) } } -void fill_spd_for_index(uint8_t spd[], unsigned int spd_index) +void copy_spd(struct pei_data *pei_data, struct spd_info *spdi) { size_t spd_file_len; uint8_t *spd_file = cbfs_map("spd.bin", &spd_file_len); - printk(BIOS_DEBUG, "SPD index %d\n", spd_index); + printk(BIOS_DEBUG, "SPD index %d\n", spdi->spd_index); if (!spd_file) die("SPD data not found."); @@ -80,16 +82,21 @@ void fill_spd_for_index(uint8_t spd[], unsigned int spd_index) if (spd_file_len < SPD_LEN) die("Missing SPD data."); - if (spd_file_len < ((spd_index + 1) * SPD_LEN)) { + if (spd_file_len < ((spdi->spd_index + 1) * SPD_LEN)) { printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n"); - spd_index = 0; + spdi->spd_index = 0; } - memcpy(spd, spd_file + (spd_index * SPD_LEN), SPD_LEN); + uint8_t *const spd = spd_file + (spdi->spd_index * SPD_LEN); /* Make sure a valid SPD was found */ if (spd[0] == 0) die("Invalid SPD data."); print_spd_info(spd); + + for (size_t i = 0; i < ARRAY_SIZE(spdi->addresses); i++) { + if (spdi->addresses[i] == SPD_MEMORY_DOWN) + memcpy(pei_data->spd_data[i / 2][i % 2], spd, SPD_LEN); + } } |