summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-10-29 13:19:48 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-24 12:01:31 +0000
commit417a6da4494dbff7e13e9a4795408d3599ef91e3 (patch)
treed94c3549d83bc1b42d8110d6bb9456dee9ba7d74 /src/soc/intel
parentf542b7bcef183ab26b194fa14a6a660eac4ae880 (diff)
soc/intel/broadwell: Select INTEL_LYNXPOINT_LP
This allows the correct Haswell and Lynxpoint code to be used. Change-Id: Icbfc5bb11b1ea755a143fa340a3971376f4e5e91 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46958 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/broadwell/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index e70966c4d8..537d4fa9e6 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -5,6 +5,10 @@ config SOC_INTEL_BROADWELL
if SOC_INTEL_BROADWELL
+config INTEL_LYNXPOINT_LP
+ bool
+ default y if SOC_INTEL_BROADWELL
+
config CPU_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES