diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-05-31 23:47:13 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-09 16:05:40 +0000 |
| commit | 3f980ca7be36339ad2cb5700bad0658643966cf2 (patch) | |
| tree | b74bde492fcfe4157e0fe94e7d1c9732c856328f /src/soc/intel | |
| parent | f4fe21d900cc0fd549ff1c65b7ecc3010bb50dfd (diff) | |
soc/intel/alderlake: Drop enable_bios_reset_cpl() function
This patch drops enable_bios_reset_cpl() as FSP sets the BIOS Reset
CPL before performing Graphics PM init (as part of FSP-S), hence,
enable_bios_reset_cpl() function getting called inside systemagent.c
is meaningless.
Also, drop 1ms delay after setting the BIOS reset CPL.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I87beb444d3910f212a5a627cb449031db6cae38d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64837
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/systemagent.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/intel/alderlake/systemagent.c b/src/soc/intel/alderlake/systemagent.c index 1bbd62af70..bb58b75eec 100644 --- a/src/soc/intel/alderlake/systemagent.c +++ b/src/soc/intel/alderlake/systemagent.c @@ -62,11 +62,6 @@ void soc_systemagent_init(struct device *dev) /* Enable Power Aware Interrupt Routing */ enable_power_aware_intr(); - /* Enable BIOS Reset CPL */ - enable_bios_reset_cpl(); - - /* Configure turbo power limits 1ms after reset complete bit */ - mdelay(1); config = config_of_soc(); /* Get System Agent PCI ID */ |