diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-11-15 05:38:25 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-11-18 02:54:40 +0000 |
| commit | 3583fe13f7c7914f1a93a71847193862c09782ac (patch) | |
| tree | 54701318d010d9f6ddbb1daa31c4a35ef19ef86f /src/soc/intel | |
| parent | 38fd03dfea97b78e100a30862d41b1d775d0b526 (diff) | |
soc/intel/pantherlake: Reduce memory test size
Enable upd to reduce size of the memory test.
TEST=Able to build and boot google/fatcat.
w/o this patch:
951:returning from FspMemoryInit 3,452,595 (365,930)
w/ this patch:
951:returning from FspMemoryInit 3,442,823 (353,928)
Change-Id: I67f10e234019e260923a28a2d71b83786dcb39ee
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85158
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/pantherlake/chipset.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/pantherlake/chipset.cb b/src/soc/intel/pantherlake/chipset.cb index f4c1b265d9..2f6bf02f50 100644 --- a/src/soc/intel/pantherlake/chipset.cb +++ b/src/soc/intel/pantherlake/chipset.cb @@ -20,6 +20,9 @@ chip soc/intel/pantherlake .tdp_pl4 = 154, }" + # Reduce the size of BasicMemoryTests to speed up the boot time. + register "lower_basic_mem_test_size" = "true" + # NOTE: if any variant wants to override this value, use the same format # as register "common_soc_config.pch_thermal_trip" = "value", instead of # putting it under register "common_soc_config" in overridetree.cb file. |