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authorArthur Heymans <arthur@aheymans.xyz>2019-10-23 17:25:58 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-11-01 11:44:51 +0000
commit340e4b80904feb6c5c21497fc52966854fa5ee79 (patch)
tree4026de0ec0cc41f51dd121a0be76642a8d0a286d /src/soc/intel
parent44874482fec69a849b06c378aa3eb69e75425256 (diff)
lib/cbmem_top: Add a common cbmem_top implementation
This adds a common cbmem_top implementation to all coreboot target. In romstage a static variable will be used to cache the result of cbmem_top_romstage. In ramstage if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is set a global variable needs to be populated by the stage entry with the value passed via the calling arguments. if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is not set the same implementation as will be used as in romstage. Change-Id: Ie767542ee25483acc9a56785ce20a885e9a63098 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/apollolake/memmap.c2
-rw-r--r--src/soc/intel/baytrail/memmap.c2
-rw-r--r--src/soc/intel/braswell/memmap.c2
-rw-r--r--src/soc/intel/broadwell/memmap.c2
-rw-r--r--src/soc/intel/cannonlake/memmap.c2
-rw-r--r--src/soc/intel/denverton_ns/memmap.c2
-rw-r--r--src/soc/intel/fsp_baytrail/memmap.c2
-rw-r--r--src/soc/intel/fsp_broadwell_de/memmap.c2
-rw-r--r--src/soc/intel/icelake/memmap.c2
-rw-r--r--src/soc/intel/quark/memmap.c2
-rw-r--r--src/soc/intel/skylake/memmap.c2
11 files changed, 11 insertions, 11 deletions
diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c
index f828024d29..567ff1ebc6 100644
--- a/src/soc/intel/apollolake/memmap.c
+++ b/src/soc/intel/apollolake/memmap.c
@@ -20,7 +20,7 @@
#include "chip.h"
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
const config_t *config;
void *tolum = (void *)sa_get_tseg_base();
diff --git a/src/soc/intel/baytrail/memmap.c b/src/soc/intel/baytrail/memmap.c
index d9f6160dfc..e0aac9f423 100644
--- a/src/soc/intel/baytrail/memmap.c
+++ b/src/soc/intel/baytrail/memmap.c
@@ -29,7 +29,7 @@ static size_t smm_region_size(void)
return CONFIG_SMM_TSEG_SIZE;
}
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
return (void *) smm_region_start();
}
diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c
index d502aed9f9..e43c5469f6 100644
--- a/src/soc/intel/braswell/memmap.c
+++ b/src/soc/intel/braswell/memmap.c
@@ -33,7 +33,7 @@ void smm_region(uintptr_t *start, size_t *size)
*size = smm_region_size();
}
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
uintptr_t smm_base;
size_t smm_size;
diff --git a/src/soc/intel/broadwell/memmap.c b/src/soc/intel/broadwell/memmap.c
index f4a9d0ed24..ad50dd35db 100644
--- a/src/soc/intel/broadwell/memmap.c
+++ b/src/soc/intel/broadwell/memmap.c
@@ -41,7 +41,7 @@ static uintptr_t dpr_region_start(void)
return tom;
}
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
return (void *) dpr_region_start();
}
diff --git a/src/soc/intel/cannonlake/memmap.c b/src/soc/intel/cannonlake/memmap.c
index 475b8c79db..7a0d89717b 100644
--- a/src/soc/intel/cannonlake/memmap.c
+++ b/src/soc/intel/cannonlake/memmap.c
@@ -247,7 +247,7 @@ void cbmem_top_init(void)
* | |
* +-------------------------+
*/
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
struct ebda_config ebda_cfg;
diff --git a/src/soc/intel/denverton_ns/memmap.c b/src/soc/intel/denverton_ns/memmap.c
index 9f788ddb41..b4761dbeef 100644
--- a/src/soc/intel/denverton_ns/memmap.c
+++ b/src/soc/intel/denverton_ns/memmap.c
@@ -60,7 +60,7 @@ u32 top_of_32bit_ram(void)
power_of_2(iqat_region_size + tseg_region_size);
}
-void *cbmem_top(void) { return (void *)top_of_32bit_ram(); }
+void *cbmem_top_chipset(void) { return (void *)top_of_32bit_ram(); }
static inline uintptr_t smm_region_start(void)
{
diff --git a/src/soc/intel/fsp_baytrail/memmap.c b/src/soc/intel/fsp_baytrail/memmap.c
index 7fec7f9764..d8dcf49acb 100644
--- a/src/soc/intel/fsp_baytrail/memmap.c
+++ b/src/soc/intel/fsp_baytrail/memmap.c
@@ -40,7 +40,7 @@ static size_t smm_region_size(void)
* @return pointer to the first byte of reserved memory
*/
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
return find_fsp_reserved_mem(*(void **)CBMEM_FSP_HOB_PTR);
}
diff --git a/src/soc/intel/fsp_broadwell_de/memmap.c b/src/soc/intel/fsp_broadwell_de/memmap.c
index cbd3cf7788..96eb20502c 100644
--- a/src/soc/intel/fsp_broadwell_de/memmap.c
+++ b/src/soc/intel/fsp_broadwell_de/memmap.c
@@ -23,7 +23,7 @@
#include <soc/pci_devs.h>
#include <device/pci_ops.h>
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
return find_fsp_reserved_mem(*(void **)CBMEM_FSP_HOB_PTR);
}
diff --git a/src/soc/intel/icelake/memmap.c b/src/soc/intel/icelake/memmap.c
index f17f255b13..76a8128520 100644
--- a/src/soc/intel/icelake/memmap.c
+++ b/src/soc/intel/icelake/memmap.c
@@ -226,7 +226,7 @@ void cbmem_top_init(void)
* | |
* +-------------------------+
*/
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
struct ebda_config ebda_cfg;
diff --git a/src/soc/intel/quark/memmap.c b/src/soc/intel/quark/memmap.c
index b8b85063a8..9ccaf55a1f 100644
--- a/src/soc/intel/quark/memmap.c
+++ b/src/soc/intel/quark/memmap.c
@@ -18,7 +18,7 @@
#include <cbmem.h>
#include <soc/reg_access.h>
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
uint32_t top_of_memory;
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index 3aea1c31e6..09dc6e9f0d 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -248,7 +248,7 @@ void cbmem_top_init(void)
* | |
* +-------------------------+
*/
-void *cbmem_top(void)
+void *cbmem_top_chipset(void)
{
struct ebda_config ebda_cfg;