cpu/x86: Add support to run function with argument over APs

This patch ensures that user can pass a function with given argument
list to execute over APs.

BUG=b:74436746
BRANCH=none
TEST=Able to run functions over APs with argument.

Change-Id: I668b36752f6b21cb99cd1416c385d53e96117213
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/25725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

10 files changed, 16 insertions, 11 deletions

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index fee9841575..f782cc3238 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -607,7 +607,7 @@ struct chip_operations soc_intel_apollolake_ops = {
 static void drop_privilege_all(void)
 {
 	/* Drop privilege level on all the CPUs */
-	if (mp_run_on_all_cpus(&cpu_enable_untrusted_mode, 1000) < 0)
+	if (mp_run_on_all_cpus(&cpu_enable_untrusted_mode, NULL, 1000) < 0)
 		printk(BIOS_ERR, "failed to enable untrusted mode\n");
 }
 
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index 172a2b9708..cda11d201a 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -243,7 +243,7 @@ static void post_mp_init(void)
 	smm_southbridge_enable(PWRBTN_EN | GBL_EN);
 
 	if (IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX))
-		mp_run_on_all_cpus(sgx_configure, 2000);
+		mp_run_on_all_cpus(sgx_configure, NULL, 2000);
 }
 
 static const struct mp_ops mp_ops = {
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index e768f8c5a4..c67904f198 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -219,7 +219,7 @@ void cpu_disable_eist(void)
  * Set Bit 6 (ENABLE_IA_UNTRUSTED_MODE) of MSR 0x120
  * UCODE_PCR_POWER_MISC MSR to enter IA Untrusted Mode.
  */
-void cpu_enable_untrusted_mode(void)
+void cpu_enable_untrusted_mode(void *unused)
 {
 	msr_t msr;
 
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 23f2fb0d47..97ad176a20 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -130,10 +130,15 @@ static void init_cpus(void *unused)
 	soc_init_cpus(dev->link_list);
 }
 
+static void wrapper_x86_setup_mtrrs(void *unused)
+{
+	x86_setup_mtrrs_with_detect();
+}
+
 /* Ensure to re-program all MTRRs based on DRAM resource settings */
 static void post_cpus_init(void *unused)
 {
-	if (mp_run_on_all_cpus(&x86_setup_mtrrs_with_detect, 1000) < 0)
+	if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL, 1000) < 0)
 		printk(BIOS_ERR, "MTRR programming failure\n");
 
 	x86_mtrr_check();
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h
index 34caf4c252..191459be5f 100644
--- a/src/soc/intel/common/block/include/intelblocks/cpulib.h
+++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h
@@ -112,7 +112,7 @@ void cpu_disable_eist(void);
  * Set Bit 6 (ENABLE_IA_UNTRUSTED_MODE) of MSR 0x120
  * UCODE_PCR_POWER_MISC MSR to enter IA Untrusted Mode.
  */
-void cpu_enable_untrusted_mode(void);
+void cpu_enable_untrusted_mode(void *unused);
 
 /*
  * This function fills in the number of Cores(physical) and Threads(virtual)
diff --git a/src/soc/intel/common/block/include/intelblocks/sgx.h b/src/soc/intel/common/block/include/intelblocks/sgx.h
index 3c87b434c2..502483f7e9 100644
--- a/src/soc/intel/common/block/include/intelblocks/sgx.h
+++ b/src/soc/intel/common/block/include/intelblocks/sgx.h
@@ -38,7 +38,7 @@ void prmrr_core_configure(void);
 /*
  * Configure SGX.
  */
-void sgx_configure(void);
+void sgx_configure(void *unused);
 
 /* SOC specific API to get SGX params.
  * returns 0, if able to get SGX params; otherwise returns -1 */
diff --git a/src/soc/intel/common/block/include/intelblocks/vmx.h b/src/soc/intel/common/block/include/intelblocks/vmx.h
index 1f6d33656e..7f65b599b4 100644
--- a/src/soc/intel/common/block/include/intelblocks/vmx.h
+++ b/src/soc/intel/common/block/include/intelblocks/vmx.h
@@ -21,7 +21,7 @@ struct vmx_param {
 /*
  * Configure VMX.
  */
-void vmx_configure(void);
+void vmx_configure(void *unused);
 
 /* SOC specific API to get VMX params.
  * returns 0, if able to get VMX params; otherwise returns -1 */
diff --git a/src/soc/intel/common/block/sgx/sgx.c b/src/soc/intel/common/block/sgx/sgx.c
index d3be15c81e..daedcfcf5d 100644
--- a/src/soc/intel/common/block/sgx/sgx.c
+++ b/src/soc/intel/common/block/sgx/sgx.c
@@ -201,7 +201,7 @@ static int is_prmrr_approved(void)
 	return 0;
 }
 
-void sgx_configure(void)
+void sgx_configure(void *unused)
 {
 	const void *microcode_patch = intel_mp_current_microcode();
 
diff --git a/src/soc/intel/common/block/vmx/vmx.c b/src/soc/intel/common/block/vmx/vmx.c
index 307ffd9ddb..591ffbc6df 100644
--- a/src/soc/intel/common/block/vmx/vmx.c
+++ b/src/soc/intel/common/block/vmx/vmx.c
@@ -43,7 +43,7 @@ static int soc_vmx_enabled(void)
 	return vmx_param ? vmx_param->enable : 0;
 }
 
-void vmx_configure(void)
+void vmx_configure(void *unused)
 {
 	msr_t msr;
 	struct cpuid_result regs;
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 4a9d298f60..7f19dac072 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -477,9 +477,9 @@ static void post_mp_init(void)
 	smm_lock();
 #endif
 
-	mp_run_on_all_cpus(vmx_configure, 2000);
+	mp_run_on_all_cpus(vmx_configure, NULL, 2000);
 
-	mp_run_on_all_cpus(sgx_configure, 2000);
+	mp_run_on_all_cpus(sgx_configure, NULL, 2000);
 }
 
 static const struct mp_ops mp_ops = {