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authorSubrata Banik <subratabanik@google.com>2022-03-14 12:00:02 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-03-17 14:37:43 +0000
commit2f1f5ecf8a3dec193bbc1c33f88a1b3b34e4809f (patch)
tree2f5f425fec4e3f14031219d0047fa5e81d2bf750 /src/soc/intel
parent9e4a38795c2392dee1d1043bb51d5af58bcb3a67 (diff)
soc/intel/common/block/p2sb: Refactor P2SB to add comprehend future SoC
This patch refactors the current P2SB common code driver to accommodate the future SoC platform with provision of more than one P2SB IP in disaggregated die architecture. IA SoC has only one P2SB in PCH die between SKL to ADL. Starting with MTL, one more P2SB IP resides in IOE die along with SoC die. (PCH die is renamed as SoC in MTL.) P2SB library (p2sblib.c) is common between PCH/SoC and IOE, and p2sb.c is added only for PCH/SoC P2SB. BUG=b:224325352 TEST=Able to build and boot brya. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ib671d9acbfdc61305ebb401499bfc4742b738ffb Reviewed-on: https://review.coreboot.org/c/coreboot/+/62774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/common/block/p2sb/Kconfig10
-rw-r--r--src/soc/intel/common/block/p2sb/Makefile.inc16
2 files changed, 16 insertions, 10 deletions
diff --git a/src/soc/intel/common/block/p2sb/Kconfig b/src/soc/intel/common/block/p2sb/Kconfig
index 7f292cde9e..ff20255613 100644
--- a/src/soc/intel/common/block/p2sb/Kconfig
+++ b/src/soc/intel/common/block/p2sb/Kconfig
@@ -1,5 +1,11 @@
-config SOC_INTEL_COMMON_BLOCK_P2SB
+config SOC_INTEL_COMMON_BLOCK_BASE_P2SB
bool
depends on SOC_INTEL_COMMON_BLOCK_PCR
help
- Intel Processor common P2SB driver
+ Intel Processor common P2SB base driver
+
+config SOC_INTEL_COMMON_BLOCK_P2SB
+ bool
+ select SOC_INTEL_COMMON_BLOCK_BASE_P2SB
+ help
+ Intel Processor common P2SB driver for PCH or SoC die
diff --git a/src/soc/intel/common/block/p2sb/Makefile.inc b/src/soc/intel/common/block/p2sb/Makefile.inc
index 5c6378e2a4..dbf45452a2 100644
--- a/src/soc/intel/common/block/p2sb/Makefile.inc
+++ b/src/soc/intel/common/block/p2sb/Makefile.inc
@@ -1,8 +1,8 @@
-ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB),y)
-bootblock-y += p2sb.c
-romstage-y += p2sb.c
-ramstage-y += p2sb.c
-ramstage-y += p2sblib.c
-smm-y += p2sb.c
-smm-y += p2sblib.c
-endif
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c
+smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c
+
+# p2sb.c for PCH and SoC die P2SB IP
+bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
+romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
+smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c