diff options
| author | Kane Chen <kane.chen@intel.com> | 2022-04-12 09:12:59 +0800 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2022-05-16 04:49:33 +0000 |
| commit | 2e96eebf011cb461e9ea7cb7bfbe66b28e8c3d54 (patch) | |
| tree | 8367dd6f86052dbf50e565b3b4804f3a7de981ed /src/soc/intel | |
| parent | c9b1f8a28e90ff6890a4f74559f5136edc5a33f9 (diff) | |
soc/intel/common: Use mp_run_on_all_cpus_synchronously for APs MTRR init
By using mp_run_on_all_cpus_synchronously to run APs MTRR init, it
gurantees the BSP will run post_cpus_add_romcache until all APs finishes
_x86_setup_mtrrs task.
BUG=b:225766934
TEST=Test on redrix and found the MTRR race condition on AP/BSP is gone.
Change-Id: I1fd889f880a0c605e6c739423a434d2adbc12d26
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/cpu/mp_init.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 823f23edfc..6105a617f0 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -169,7 +169,8 @@ static void wrapper_x86_setup_mtrrs(void *unused) /* Ensure to re-program all MTRRs based on DRAM resource settings */ static void post_cpus_init(void *unused) { - if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL) != CB_SUCCESS) + /* Ensure all APs finish the task and continue */ + if (mp_run_on_all_cpus_synchronously(&wrapper_x86_setup_mtrrs, NULL) != CB_SUCCESS) printk(BIOS_ERR, "MTRR programming failure\n"); post_cpus_add_romcache(); |