diff options
author | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-11-26 15:04:46 +0100 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-11-30 10:26:56 +0000 |
commit | 2af17af82981df83b91a58f88dc6aa143e6dee55 (patch) | |
tree | 355a591acfc032b99a272427523ef073b2abafcb /src/soc/intel | |
parent | aea00f496b1cf41fd5b568b4c6079c2ab76eafd4 (diff) |
security/vboot: Fix remaining measured boot issues
Makes vboot measured boot mode available for all boards.
* Increase Tegra210 and Rockchip3228 SRAM for
romstage/verstage.
* Add missing files for Intel apollolake and
AMD stoneyridge as TPM driver target.
Change-Id: I35a85b8f137f28cd9960f2c5ce95f8fa31185b82
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 6168f86449..19ebe7c55b 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -75,6 +75,7 @@ postcar-y += i2c.c postcar-$(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE) += heci.c postcar-$(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE) += reset.c postcar-$(CONFIG_UART_DEBUG) += uart.c +postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += gspi.c verstage-y += car.c verstage-y += i2c.c |