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authorAamir Bohra <aamir.bohra@intel.com>2019-09-27 12:05:59 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-09-30 12:00:57 +0000
commit0e1245e3d065287b3f731e92fa45811225462532 (patch)
treeb24fe007196b84d3f0b3bb6b758c7e2cedaf8ca2 /src/soc/intel
parent7b2da05310c3cf65506946484134e8ed6400504d (diff)
mb/google/drallion: Configure LPSS controller parameters
drallion uses below LPSS controllers: I2C: 0/1/4 GSPI: None UART: 0(Console) BUG=b:141575294 Change-Id: I9c57f8054f5da5add667168502ebc3e089c440f8 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Diffstat (limited to 'src/soc/intel')
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