diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2021-03-09 14:40:39 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-03-11 05:06:43 +0000 |
| commit | 06039025250e0908c8da63f879eafd2b3581db19 (patch) | |
| tree | 733f5fd080bb87a9880441f9041ac17e4def6e64 /src/soc/intel | |
| parent | 492a792d3872ee2683db169fb011daf87b71bff9 (diff) | |
soc/intel/common/block/cpu: Use tab instead of space
Convert the lines starts with whitespace with tab as applicable.
TEST=Built google/brya0 and ADLRVP with BUILD_TIMELESS=1: no changes.
Change-Id: Ibd11ad12caa1be866a851a8cd4bd23349e8ffbbe
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51375
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/cpu/car/cache_as_ram.S | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index 4df7eac319..0d9eb67b94 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -398,15 +398,15 @@ find_llc_subleaf: * Then we need to allocate just one way for non-eviction * of RW data. */ - movl $0x01, %eax - cmp $CONFIG_DCACHE_RAM_SIZE, %ecx - jnc set_eviction_mask + movl $0x01, %eax + cmp $CONFIG_DCACHE_RAM_SIZE, %ecx + jnc set_eviction_mask /* * RW data size / way size is equal to number of * ways to be configured for non-eviction */ - mov $CONFIG_DCACHE_RAM_SIZE, %eax + mov $CONFIG_DCACHE_RAM_SIZE, %eax div %ecx mov %eax, %ecx movl $0x01, %eax @@ -441,11 +441,11 @@ set_eviction_mask: * - If this bit is '0' - the way is protected from eviction * - If this bit is '1' - the way is not protected from eviction */ - mov $0x1, %eax - shl %cl, %eax - subl $0x01, %eax - mov %eax, %ecx - mov %ebx, %eax + mov $0x1, %eax + shl %cl, %eax + subl $0x01, %eax + mov %eax, %ecx + mov %ebx, %eax xor $~0, %eax /* invert 32 bits */ and %ecx, %eax |