diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-01-20 22:36:20 +0100 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-24 12:06:39 +0000 |
commit | ac1c9bb5cdca24312c669eaaa908b13202e3bb35 (patch) | |
tree | b26cf14dc049b07744c18d8213b2339f6e96c4f8 /src/soc/intel | |
parent | d626e554aa6f2a15c2ac4c971d1e5d3a9405b5fc (diff) |
broadwell: Clean up `mainboard_post_raminit`
Make it optional and change its signature.
Change-Id: I4b5f3fb08e8954514ebf39e72c95aa62d66856d7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/broadwell/include/soc/romstage.h | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/romstage.c | 6 |
2 files changed, 6 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h index 646ad0e5dc..eb51ea151e 100644 --- a/src/soc/intel/broadwell/include/soc/romstage.h +++ b/src/soc/intel/broadwell/include/soc/romstage.h @@ -12,7 +12,7 @@ struct romstage_params { }; void mainboard_pre_raminit(struct romstage_params *params); -void mainboard_post_raminit(struct romstage_params *params); +void mainboard_post_raminit(const int s3resume); void raminit(struct pei_data *pei_data); diff --git a/src/soc/intel/broadwell/romstage.c b/src/soc/intel/broadwell/romstage.c index 8e884d5d35..084c3e6e99 100644 --- a/src/soc/intel/broadwell/romstage.c +++ b/src/soc/intel/broadwell/romstage.c @@ -14,6 +14,10 @@ #include <stdint.h> #include <timestamp.h> +__weak void mainboard_post_raminit(const int s3resume) +{ +} + /* Entry from cpu/intel/car/romstage.c. */ void mainboard_romstage_entry(void) { @@ -64,5 +68,5 @@ void mainboard_romstage_entry(void) romstage_handoff_init(rp.power_state->prev_sleep_state == ACPI_S3); - mainboard_post_raminit(&rp); + mainboard_post_raminit(rp.power_state->prev_sleep_state == ACPI_S3); } |