summaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
authorPatrick Georgi <patrick@georgi-clan.de>2014-05-17 13:53:11 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-05-17 21:14:24 +0200
commit98f49d28233f68aeb9dfccc6d7e633ae35449e00 (patch)
treefac833f6adb8c5c77cfaa1d63535a8380f37529d /src/soc/intel
parentc2a0b7d990ff162504bbd1aef27c049ea885a38b (diff)
build: CPPFLAGS is more common than INCLUDES
Rename INCLUDES to CPPFLAGS since the latter is more commonly used for preprocessor options. Change-Id: I522bb01c44856d0eccf221fa43d2d644bdf01d69 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5764 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/baytrail/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index f93435be80..179f2a64ee 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -53,7 +53,7 @@ ramstage-$(CONFIG_ELOG) += elog.c
# Remove as ramstage gets fleshed out
ramstage-y += placeholders.c
-INCLUDES += -Isrc/soc/intel/baytrail/
+CPPFLAGS += -Isrc/soc/intel/baytrail/
# Run an intermediate step when producing coreboot.rom
# that adds additional components to the final firmware