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authorArthur Heymans <arthur@aheymans.xyz>2020-12-11 09:46:03 +0100
committerArthur Heymans <arthur@aheymans.xyz>2020-12-14 10:38:34 +0000
commit86d195b192e369eda83035f5c1c2158028d6800b (patch)
treecde03f68fd697d45f16ff62008bec1e6e99f4c41 /src/soc/intel
parent63a078e66d3ecb9a8e23c914b5ee6d9e89ef4cf3 (diff)
soc/intel/xeon_sp/skx: Hook up microcode blob
TESTED on ocp/tiagopass: Microcode updates are properly applied (via FIT). Tested with out of tree patches to report the revision. Change-Id: I05ddc64090424aa333848d9a0f54f21538faf94c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48559 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/xeon_sp/Kconfig1
-rw-r--r--src/soc/intel/xeon_sp/cpx/Kconfig4
-rw-r--r--src/soc/intel/xeon_sp/skx/Makefile.inc2
3 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index 2028a5e219..664f9606e3 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -57,7 +57,6 @@ config CPU_SPECIFIC_OPTIONS
select TSC_MONOTONIC_TIMER
select UDELAY_TSC
select SUPPORT_CPU_UCODE_IN_CBFS
- select MICROCODE_BLOB_NOT_HOOKED_UP
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select FSP_CAR
select CPU_INTEL_COMMON_SMM
diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
index 369d474552..43337b5b67 100644
--- a/src/soc/intel/xeon_sp/cpx/Kconfig
+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
@@ -2,6 +2,10 @@
if SOC_INTEL_COOPERLAKE_SP
+config SOC_SPECIFIC_OPTIONS
+ def_bool y
+ select MICROCODE_BLOB_NOT_HOOKED_UP
+
config FSP_HEADER_PATH
string "Location of FSP headers"
depends on MAINBOARD_USES_FSP2_0
diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc
index 6ee610eded..085dd202b3 100644
--- a/src/soc/intel/xeon_sp/skx/Makefile.inc
+++ b/src/soc/intel/xeon_sp/skx/Makefile.inc
@@ -29,4 +29,6 @@ ramstage-y += hob_display.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/skx/include -I$(src)/soc/intel/xeon_sp/skx
+cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-04
+
endif ## CONFIG_SOC_INTEL_SKYLAKE_SP